Bomb error codes: Difference between revisions
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− | <pre> |
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+ | {| class="wikitable" style="text-align:left;font-size:90%;background:#efefef;border:1px solid #666;width:100%;" |
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− | Description 68000 chip # of bombs |
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+ | |+ style="font-size:12pt;padding:0.2em 0;border:1px solid #666;border-bottom:0;" | '''''Bomb error codes''''' |
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− | =========================================== |
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+ | ! No. of bombs !! Description |
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− | Reset: Initial PC2...............1 |
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+ | |- |
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− | Bus Error........................2 |
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+ | | 1 || [[Reset]] |
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− | Address Error....................3 |
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+ | |- |
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− | Illegal Instruction..............4 |
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+ | | 2 || [[Bus error]] |
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− | Zero Divide......................5 |
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+ | |- |
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− | CHK Instruction..................6 |
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+ | | 3 || [[Address error]] |
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− | TRAPV Instruction................7 |
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+ | |- |
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− | Privilege Violation..............8 |
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+ | | 4 || [[Illegal instruction]] |
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− | Trace............................9 |
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+ | |- |
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− | Line 1010 Emulator..............10 |
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+ | | 5 || [[Division by zero]] |
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− | Line 1111 Emulator..............11 |
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+ | |- |
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⚫ | |||
+ | | 6 || [[CHK]] instruction |
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⚫ | |||
+ | |- |
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− | Format Error....................14 |
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+ | | 7 || [[TRAPV]] instruction |
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− | Uninitialized Interrupt Vector..15 |
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+ | |- |
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⚫ | |||
+ | | 8 || [[Privilege violation]] |
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− | Spurious Interrupt..............24 |
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+ | |- |
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− | Level 1 Interrupt Autovector....25 |
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+ | | 9 || [[Trace]] |
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− | Level 2 Interrupt Autovector....26 |
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+ | |- |
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− | Level 3 Interrupt Autovector....27 |
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+ | | 10 || [[Line A]] emulator |
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− | Level 4 Interrupt Autovector....28 |
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+ | |- |
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− | Level 5 Interrupt Autovector....29 |
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+ | | 11 || [[Line F]] emulator |
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− | Level 6 Interrupt Autovector....30 |
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+ | |- |
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− | Level 7 Interrupt Autovector....31 |
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⚫ | |||
− | Trap Instruction Vectors.....32-47 |
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+ | |- |
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− | [unassigned, reserved].......48-63 |
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+ | | 14 || [[Format error]] |
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− | User Interrupt Vectors......64-255 |
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+ | |- |
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⚫ | |||
+ | | 15 || Uninitialized [[interrupt vector]] |
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⚫ | |||
+ | |- |
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⚫ | |||
+ | |- |
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+ | | 24 || [[Spurious interrupt]] |
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+ | |- |
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+ | | 25 || Level 1 [[interrupt autovector]] |
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+ | |- |
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+ | | 26 || Level 2 interrupt autovector |
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+ | |- |
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+ | | 27 || Level 3 interrupt autovector |
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+ | |- |
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+ | | 28 || Level 4 interrupt autovector |
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+ | |- |
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+ | | 29 || Level 5 interrupt autovector |
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+ | |- |
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+ | | 30 || Level 6 interrupt autovector |
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+ | |- |
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+ | | 31 || Level 7 interrupt autovector |
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+ | |- |
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+ | | 32 - 47 || [[Trap instruction vector|Trap instruction vectors]] |
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+ | |- |
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⚫ | |||
+ | |- |
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+ | | 64 - 255 || [[User interrupt vector|User interrupt vectors]] |
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+ | |} |
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+ | |||
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