Pl INSTRUC2.DOC: Difference between revisions

From Atari Wiki
Jump to navigation Jump to search
(Replacing content of with translated version)
Tag: Removed redirect
mNo edit summary
 
(10 intermediate revisions by the same user not shown)
Line 1: Line 1:
  +
{{Languages|Pl INSTRUC2.DOC}}
−
CONTINUATION OF THE COURSE ON INSTRUCTIONS from the INSTRUC.DOC file----------------------------------------------------------
  
−  
   
  +
<pre>
  +
CONTINUATION OF THE COURSE ON INSTRUCTIONS from the INSTRUC.DOC file
  +
----------------------------------------------------------
   
 
LSL #BBB,dn (.B),[.W],(.L) (Logical Shift Left)
  
LSL #BBB,dn (.B),[.W],(.L) (Logical Shift Left)
Line 14: Line 16:
 
------------------
  
------------------
   
−
Allows a shift by #BBB or dm (according to syntax) BITS
 +
Performs a shift of #BBB or dm (depending on the syntax) BITS
 
of the data register dn to the left.
  
of the data register dn to the left.
−
Replacement bits are ZERO.
 +
The replacement bits are ZEROS.
   
−
However, it must be that 1<= #BBB <= 8 for the 1st form.
 +
It is necessary that 1<= #BBB <= 8 for the 1st form.
−
-------------
+
-------------
   
−
For the 3rd form, the addressing modes allowed for the operand
 +
For the 3rd form, the allowed addressing modes for the
−
destination are:
 +
destination operand are:
−
-----------
 +
-----------
 
BBBB
  
BBBB
 
BB
  
BB
Line 31: Line 33:
 
d(an)
  
d(an)
 
d(an,rn)
  
d(an,rn)
  +
−
 
 
But in this case, the operation can only shift
  
But in this case, the operation can only shift
 
1 SINGLE BIT.
  
1 SINGLE BIT.
   
  +
For example, if d0=%10000101110001101111011100000110 (word)
−
 
−
That is to say that for example if d0=%10000101110001101111011100000110 (word)
  
 
------
  
------
−
And I write LSL.W #1,dn
+
And if I write LSL.W #1,dn
   
−
or MOVE.W #1,d1
 +
or MOVE.W #1,d1
−
LSL.W d1,d0 , we obtain:
 +
LSL.W d1,d0, we get:
   
−
d0=%00001011100011011110111000001100
+
d0=%00001011100011011110111000001100
−
<-------- <--:0
+
<-------- <--:0
   
−
All Bits of the LOW word of the data register dn (.W)
 +
All the bits of the lower WORD of the data register dn (.W)
 
have been shifted by 1 bit to the left:
  
have been shifted by 1 bit to the left:
   
−
The incoming least-significant bit is always replaced with a
+
The least significant bit entering is always replaced by a
−
ZERO bit.
 +
NULL bit.
 
 
−
That is to say: That we move #BBB or dm BITS out of dn from the left and that the
 +
Meaning: #BBB or dm BITS are shifted out of dn to the left and the
−
replacement bits entering on the right of dn are ZERO BITS.
 +
replacement bits entering on the right of dn are NULL BITS.
   
−
The content of dn is therefore changed, the MSB also has a chance to be
 +
The contents of dn are therefore changed, the MSB is also likely to change,
−
changed, which is why the SIGN of dn will not necessarily be preserved.
 +
that's why the SIGN of dn may not necessarily be preserved.
   
−
The CCR will be changed according to the new value of dn.
 +
The CCR will change according to the new value of dn.
 
---
  
---
−
N=1 if the MSB is 1, otherwise it is equal to 0
 +
N=1 if the MSB is 1, otherwise it is 0
−
Z=1 if all bits of dn are zero, otherwise it is equal to 0
 +
Z=1 if all bits of dn are null, otherwise it is 0
 
V is always set to 0
  
V is always set to 0
 
C and X are set to the value of the LAST BIT EXITED from dn.
  
C and X are set to the value of the LAST BIT EXITED from dn.
Line 71: Line 72:
 
LSL.B #5,d0
  
LSL.B #5,d0
   
−
We operate a shift of 5 bits of the LOW BYTE of d0
 +
A shift of 5 bits of the lower BYTE of d0 is operated
 
(only bits 0 to 7 of d0 are therefore concerned by lsl.B)
  
(only bits 0 to 7 of d0 are therefore concerned by lsl.B)
   
Line 80: Line 81:
 
X=C=0 <- 1111111110100000 in d0
 
X=C=0 <- 1111111110100000 in d0
   
−
5 zero bits entered to the right of the low byte of d0, the
 +
5 null bits have entered the right of the lower byte of d0, the
−
last bit to exit from d0 was zero: X=C=0 in the CCR
 +
last bit to exit from d0 was null: bit X=C=0 in the CCR
   
   
−
...
  
   
−
Back to [[ASM_Tutorial]]
  
−
[[Category: ASSEMBLER 68000 on ATARI ST Part 1 ]]
  
   
  +
LSR #BBB,dn (.B),[.W],(.L) (Logical Shift Right)
−
(Note: Due to the length of the document, only a fragment of the translation is produced. The translation task can continue with subsequent requests if the remaining parts of the document require translation.)
  
  +
--------------
  +
or
  +
  +
LSR dm,dn (.B),[.W],(.L)
  +
--------------
  +
or
  +
  +
LSR.W destination (.W)
  +
------------------
  +
  +
Performs a shift of #BBB or dm (depending on the syntax) BITS
  +
of the data register dn to the right.
  +
The replacement bits are ZEROS.
  +
  +
It is necessary that 1<= #BBB <= 8 for the 1st form.
  +
-------------
  +
For the 3rd form, the allowed addressing modes for the
  +
destination operand are:
  +
-----------
  +
BBBB
  +
BB
  +
(an)
  +
-(an)
  +
(an)+
  +
d(an)
  +
d(an,rn)
  +
  +
But in this case, the operation can only shift
  +
1 SINGLE BIT.
  +
  +
For example, if d0=%10000101110001101111011100000110 (word)
  +
------
  +
And if I write LSR.W #1,dn
  +
  +
or MOVE.W #1,d1
  +
LSR.W d1,d0, we get:
  +
  +
d0=%01000010111000110111101110000011
  +
0:--> ------->
  +
  +
All the bits of the lower WORD of the data register dn (.W)
  +
have been shifted by 1 bit to the right:
  +
  +
The most significant bit entering is always replaced by a
  +
NULL bit.
  +
  +
Meaning: #BBB or dm BITS are shifted out of dn to the right and the
  +
replacement bits entering on the left of dn are NULL BITS.
  +
  +
The contents of dn are therefore changed, the MSB is also likely to change,
  +
that's why the SIGN of dn may not necessarily be preserved.
  +
  +
The CCR will change according to the new value of dn.
  +
---
  +
N=1 if the MSB is 1, otherwise it is 0
  +
Z=1 if all bits of dn are null, otherwise it is 0
  +
V is always set to 0
  +
C and X are set to the value of the LAST BIT EXITED from dn.
  +
  +
  +
Example of use:
  +
----------------------
  +
MOVE #%1111111101010101,d0
  +
LSR.B #5,d0
  +
  +
A shift of 5 bits of the lower BYTE of d0 is operated.
  +
(only bits 0 to 7 of d0 are therefore concerned by lsr.B)
  +
  +
We get:
  +
  +
------0:>------> CCR
  +
  +
d0 :1111111100000010 -> X=C=1
  +
  +
5 null bits have entered the left of the lower byte of d0, the
  +
last bit to exit from d0 was 1: bit X=C=1 in the CCR
  +
  +
ASL #BBB,dn (.B),[.W],(.L) (Arithmetic Shift Left)
  +
--------------
  +
or
  +
  +
ASL dm,dn (.B),[.W],(.L)
  +
--------------
  +
or
  +
  +
ASL.W destination (.W)
  +
------------------
  +
  +
This instruction is identical to LSL.
  +
  +
However, with ASL, the V bit of the CCR is set to 1 if the MSB of the
  +
destination operand is changed.
  +
---
  +
  +
  +
  +
  +
ASR #BBB,dn (.B),[.W],(.L) (Arithmetic Shift Right)
  +
--------------
  +
or
  +
  +
ASR dm,dn (.B),[.W],(.L)
  +
--------------
  +
or
  +
  +
ASR.W destination (.W)
  +
------------------
  +
  +
Performs a shift of #BBB or dm (depending on the syntax) BITS
  +
of the data register dn to the right.
  +
The replacement bits are equal to the most significant bit.
  +
  +
It is necessary that 1<= #BBB <= 8 for the 1st form.
  +
-------------
  +
For the 3rd form, the allowed addressing modes for the
  +
destination operand are:
  +
-----------
  +
BBBB
  +
BB
  +
(an)
  +
-(an)
  +
(an)+
  +
d(an)
  +
d(an,rn)
  +
  +
But in this case, the operation can only rotate
  +
1 SINGLE BIT.
  +
  +
For example, if d0=%10000101110001101111011100000110 (word)
  +
------
  +
MSB=1
  +
  +
And if I write ASR.W #1,dn
  +
  +
or MOVE.W #1,d1
  +
ASR.W d1,d0, we get:
  +
  +
d0=%11000010111000110111101110000011
  +
MSB=1:--> ------->
  +
  +
  +
All the bits of the lower WORD of the data register dn (.W)
  +
have been shifted by 1 bit to the right:
  +
  +
The least significant bit exits on the right.
  +
The replacement bit is identical to the MSB preceding the rotation.
  +
  +
Meaning: #BBB or dm BITS are shifted out of dn to the right and they
  +
enter bits equal to the most significant bit on the left, in place
  +
of the missing bit.
  +
  +
The contents of dn are therefore changed but its SIGN is PRESERVED because the
  +
MSB remains unchanged.
  +
  +
The CCR will change according to the new value of dn.
  +
---
  +
N=1 if the MSB is 1, otherwise it is 0
  +
Z=1 if all bits of dn are null, otherwise it is 0
  +
V is set to 1 if the MSB of the destination operand has been changed.
  +
C and X are set to the value of the LAST BIT EXITED from dn.
  +
  +
  +
Example of use:
  +
----------------------
  +
MOVE #%1111111101010101,d0
  +
ASR.W #5,d0
  +
  +
bit nr°15=1
  +
  +
A shift of 5 bits of the lower WORD of d0 is operated.
  +
(only bits 0 to 15 of d0 are therefore concerned by asr.W)
  +
  +
We get:
  +
  +
MSB>---------------> CCR
  +
  +
d0 :1111111111111010 -> X=C=1 at the end
  +
  +
5 bits are shifted out to the right of the lower WORD of d0 and we
  +
placed successively 5 bits equal to 1 (bit nr°15=1) in place of the
  +
most significant bit of the WORD.
  +
The sign of d0 remains preserved.
  +
  +
The last bit to exit from d0 was equal to 1:
  +
the bit X=C=1 in the CCR
  +
  +
  +
  +
  +
ROL #BBB,dn (.B),[.W],(.L) ROtate Left
  +
--------------
  +
or
  +
  +
ROL dm,dn (.B),[.W],(.L)
  +
--------------
  +
or
  +
  +
ROL.W destination (.W)
  +
------------------
  +
  +
Performs a ROTATION of #BBB or dm (depending on the syntax) BITS
  +
of the data register dn to the left.
  +
The replacement bits are equal to those that just exited.
  +
  +
It is necessary that 1<= #BBB <= 8 for the 1st form.
  +
-------------
  +
For the 3rd form, the allowed addressing modes for the
  +
destination operand are:
  +
-----------
  +
BBBB
  +
BB
  +
(an)
  +
-(an)
  +
(an)+
  +
d(an)
  +
d(an,rn)
  +
  +
But in this case, the operation can only rotate
  +
1 SINGLE BIT.
  +
  +
For example, if d0=%10000101110001101111011100000110 (word)
  +
------
  +
  +
And if I write ROL.W #1,dn
  +
  +
or MOVE.W #1,d1
  +
ROL.W d1,d0, we get:
  +
  +
d0=%00001011100011011110111000001101
  +
<----- <:1
  +
  +
  +
All the bits of the lower WORD of the data register dn (.W)
  +
have been rotated by 1 bit to the left:
  +
  +
The most significant bit exits on the left and returns on the
  +
right. (rotation)
  +
  +
Meaning: #BBB or dm BITS are rotated out of dn on the left and they
  +
re-enter on the right, in place of the missing bits.
  +
  +
The contents of dn are therefore changed, the MSB is also likely to be
  +
changed: the sign of the register is therefore not necessarily preserved.
  +
  +
The CCR will change according to the new value of dn.
  +
---
  +
N=1 if the MSB is 1, otherwise it is 0
  +
Z=1 if all bits of dn are null, otherwise it is 0
  +
V is set to 1 if the MSB of the destination operand has been changed.
  +
C is set to the value of the LAST BIT EXITED from dn.
  +
X is not affected.
  +
  +
Example of use:
  +
----------------------
  +
MOVE #%1111111101010101,d0
  +
ROL.B #5,d0
  +
  +
  +
A rotation of 5 bits of the lower BYTE of d0 is operated.
  +
(only bits 0 to 7 of d0 are therefore concerned by rol.B)
  +
  +
We get:
  +
  +
-------C<------<:C CCR
  +
  +
d0 :1111111110101010 -> C=0 at the end
  +
  +
5 bits are rotated out to the left of the lower byte of d0 and were
  +
replaced with bits equal to the least significant bit of the byte.
  +
  +
The last bit to exit from d0 was equal to 0:
  +
the bit C=0 in the CCR
  +
  +
ROR #BBB,dn (.B),[.W],(.L) ROtate Right
  +
--------------
  +
or
  +
  +
ROR dm,dn (.B),[.W],(.L)
  +
--------------
  +
or
  +
  +
ROR.W destination (.W)
  +
------------------
  +
  +
Performs a ROTATION of #BBB or dm (depending on the syntax) BITS
  +
of the data register dn to the right.
  +
The replacement bits are equal to those that just exited.
  +
  +
It is necessary that 1<= #BBB <= 8 for the 1st form.
  +
-------------
  +
For the 3rd form, the allowed addressing modes for the
  +
destination operand are:
  +
-----------
  +
BBBB
  +
BB
  +
(an)
  +
-(an)
  +
(an)+
  +
d(an)
  +
d(an,rn)
  +
  +
But in this case, the operation can only rotate
  +
1 SINGLE BIT.
  +
  +
For example, if d0=%10000101110001101111011100000110 (word)
  +
------
  +
  +
And if I write ROR.W #1,dn
  +
  +
or MOVE.W #1,d1
  +
ROR.W d1,d0, we get:
  +
  +
d0=%01000010111000110111101110000011
  +
--> --->
  +
  +
  +
All the bits of the lower WORD of the data register dn (.W)
  +
have been rotated by 1 bit to the right:
  +
  +
The least significant bit exits on the right and returns on the
  +
left. (rotation)
  +
  +
Meaning: #BBB or dm BITS are rotated out of dn to the right and they
  +
re-enter on the left, in place of the missing bits.
  +
  +
The contents of dn are therefore changed, the MSB is also likely to be
  +
changed: the sign of the register is therefore not necessarily preserved.
  +
  +
The CCR will change according to the new value of dn.
  +
---
  +
N=1 if the MSB is 1, otherwise it is 0
  +
Z=1 if all bits of dn are null, otherwise it is 0
  +
V is set to 1 if the MSB of the destination operand has been changed.
  +
C is set to the value of the LAST BIT EXITED from dn.
  +
X is not affected.
  +
  +
Example of use:
  +
----------------------
  +
MOVE #%1111111101010101,d0
  +
ROR.B #5,d0
  +
  +
  +
A rotation of 5 bits of the lower BYTE of d0 is operated.
  +
(only bits 0 to 7 of d0 are therefore concerned by ror.B)
  +
  +
We get:
  +
  +
-------C>------>:C CCR
  +
  +
d0 :1111111110101010 -> C=1 at the end
  +
  +
5 bits are rotated out to the right of the lower byte of d0 and were
  +
replaced with bits equal to the most significant bit of the byte.
  +
  +
The last bit to exit from d0 was equal to 1:
  +
the bit C=1 in the CCR
  +
  +
  +
  +
ROXL #BBB,dn (.B),[.W],(.L) ROtate Left with eXtend
  +
--------------
  +
or
  +
  +
ROXL dm,dn (.B),[.W],(.L)
  +
--------------
  +
or
  +
  +
ROXL.W destination (.W)
  +
-------------------
  +
  +
  +
  +
ROXL is identical to ROL except that here the X bit of the CCR is (like
  +
the C bit) loaded with the last bit that just exited and
  +
it is copied in place of the missing bit.
  +
  +
  +
  +
ROXR #BBB,dn (.B),[.W],(.L) ROtate Right with eXtend
  +
--------------
  +
or
  +
  +
ROXR dm,dn (.B),[.W],(.L)
  +
--------------
  +
or
  +
  +
ROXR.W destination (.W)
  +
-------------------
  +
  +
  +
ROXR is identical to ROR except that here the X bit of the CCR is (like
  +
the C bit) loaded with the last bit that just exited and
  +
it is copied in place of the missing bit.
  +
  +
  +
  +
  +
BTST source,dn (.B),[.W],(.L) (TeST a Bit)
  +
----------------
  +
or
  +
  +
BTST source,destination (.B),[.W],(.L)
  +
------------------------
  +
  +
Tests the value (0 or 1) of a BIT.
  +
  +
If the BIT is NULL: the Z bit of the CCR is set to 1
  +
- -
  +
If the BIT is ACTIVE: the Z bit of the CCR is set to 0
  +
- -
  +
  +
For the first form:
  +
--------------
  +
The source operand indicates the BIT number to test, it admits the
  +
addressing modes: --
  +
  +
dn
  +
#BBB
  +
  +
(with 0<= NR° <=32, modulo 32)
  +
  +
The destination operand is a data register.
  +
-----------
  +
For the second form:
  +
-------------
  +
The source operand indicates the BIT number to test, it admits the
  +
addressing modes: --
  +
  +
dn
  +
#BBB
  +
  +
(with 0<= NR° <=32, modulo 32)
  +
  +
The destination operand indicates the data to process, it admits the
  +
addressing modes:
  +
  +
dn
  +
BBBB
  +
BB
  +
(an)
  +
-(an)
  +
(an)+
  +
d(an)
  +
d(an,rn)
  +
d(pc)
  +
d(pc,rn)
  +
  +
  +
Apart from the Z bit of the CCR, the bits of the CCR are not affected by
  +
the instruction. ---
  +
  +
  +
Example of use:
  +
----------------------
  +
MOVE #%0111101101100101,d0
  +
BTST.B #3,d0 ;Test the bit nr°3 of d0
  +
BEQ zero ;Z=1 ?
  +
BNE un ;Z=0 ?
  +
  +
The BIT nr°3 of the lower byte of the word
  +
%0111101101100101 is tested.
  +
It is equal to 0: Z=1 in the CCR, we jump to 'zero'
  +
  +
  +
  +
BSET source,dn (.B),[.W],(.L) (test a Bit and SET)
  +
----------------
  +
or
  +
  +
BSET source,destination (.B),[.W],(.L)
  +
------------------------
  +
  +
Tests the value (0 or 1) of a BIT.
  +
  +
. If the BIT is NULL: the Z bit of the CCR is set to 1
  +
- -
  +
. If the BIT is ACTIVE: the Z bit of the CCR is set to 0
  +
- -
  +
. After the test, the concerned BIT is set to 1
  +
--- -------
  +
  +
For the first form:
  +
--------------
  +
The source operand indicates the BIT number to test, it admits the
  +
addressing modes: --
  +
  +
dn
  +
#BBB
  +
  +
(with 0<= NR° <=32, modulo 32)
  +
  +
The destination operand is a data register.
  +
----------- ------------------
  +
For the second form:
  +
-------------
  +
The source operand indicates the BIT number to test, it admits the
  +
addressing modes: --
  +
  +
dn
  +
#BBB
  +
  +
(with 0<= NR° <=32, modulo 32)
  +
  +
The destination operand indicates the data to process, it admits the
  +
addressing modes:
  +
  +
dn
  +
BBBB
  +
BB
  +
(an)
  +
-(an)
  +
(an)+
  +
d(an)
  +
d(an,rn)
  +
  +
  +
Apart from the Z bit of the CCR, the bits of the CCR are not affected by
  +
the instruction. ---
  +
  +
  +
Example of use:
  +
---------------------
  +
MOVE #%0111101101100101,d0
  +
BSET.B #3,d0 ;Test the bit nr°3 of d0 and SET to 1
  +
BEQ zero ;Z=1 ?
  +
BNE un ;Z=0 ?
  +
  +
The BIT nr°3 of the lower byte of the word
  +
%0111101101100101 is tested.
  +
It is equal to 0: Z=1 in the CCR, we jump to 'zero'.
  +
The bit nr°3 has been set to 1: thus d0=%0111101101101101
  +
  +
  +
  +
  +
BCHG source,dn (.B),[.W],(.L) (Bit CHanGe)
  +
----------------
  +
or
  +
  +
BCHG source,destination (.B),[.W],(.L)
  +
------------------------
  +
  +
Tests the value (0 or 1) of a BIT.
  +
  +
If the BIT is NULL: the Z bit of the CCR is set to 1
  +
  +
If the BIT is ACTIVE: the Z bit of the CCR is set to 0
  +
  +
After the test, the concerned bit is changed to its opposite:
  +
  +
. 0 if it was equal to 1
  +
. 1 if it was equal to 0
  +
  +
For the first form:
  +
--------------
  +
The source operand indicates the BIT number to test, it admits the
  +
addressing modes: --
  +
  +
dn
  +
#BBB
  +
  +
(with 0<= NR° <=32, modulo 32)
  +
  +
The destination operand is a data register.
  +
----------- ------------------
  +
For the second form:
  +
-------------
  +
The source operand indicates the BIT number to test, it admits the
  +
addressing modes: --
  +
  +
dn
  +
#BBB
  +
  +
(with 0<= BIT number <=32, modulo 32)
  +
  +
The destination operand indicates the data to be processed, it admits
  +
the addressing modes:
  +
  +
dn
  +
BBBB
  +
BB
  +
  +
(an)
  +
-(an)
  +
(an)+
  +
d(an)
  +
d(an,rn)
  +
  +
  +
Apart from the Z bit of the CCR, the bits of the CCR are not affected by
  +
the instruction. ---
  +
  +
  +
Example of use:
  +
----------------------
  +
MOVE #%0111101101100101,d0
  +
BTST.B #3,d0 ;Test bit nr°3 of d0
  +
BEQ zero ;Z=1 ?
  +
BNE un ;Z=0 ?
  +
  +
Test the BIT nr°3 of the lower byte of the word
  +
%0111101101100101.
  +
It is equal to 0: Z=1 in the CCR, jump to 'zero'.
  +
The bit nr°3 has been changed to its opposite: therefore, d0=%0111101101101101
  +
  +
  +
BCLR source,dn (.B),[.W],(.L) (Bit CLeaR)
  +
----------------
  +
or
  +
  +
BCLR source,destination (.B),[.W],(.L)
  +
------------------------
  +
  +
Tests the value (0 or 1) of a BIT.
  +
  +
. If the BIT is NULL: the Z bit of the CCR is set to 1
  +
--- - -
  +
. If the BIT is ACTIVE: the Z bit of the CCR is set to 0
  +
----- - -
  +
. After the test, the concerned bit is set to 0.
  +
--- -------
  +
  +
For the first form:
  +
--------------
  +
The source operand indicates the BIT number to test, it admits the
  +
addressing modes: --
  +
  +
dn
  +
#BBB
  +
  +
(with 0<= BIT number <=32, modulo 32)
  +
  +
The destination operand is a data register.
  +
----------- ------------------
  +
For the second form:
  +
-------------
  +
The source operand indicates the BIT number to test, it admits the
  +
addressing modes: --
  +
  +
dn
  +
#BBB
  +
  +
(with 0<= BIT number <=32, modulo 32)
  +
  +
The destination operand indicates the data to process, it admits
  +
the addressing modes:
  +
  +
dn
  +
BBBB
  +
BB
  +
(an)
  +
-(an)
  +
(an)+
  +
d(an)
  +
d(an,rn)
  +
  +
  +
Apart from the Z bit of the CCR, the bits of the CCR are not affected by
  +
the instruction. ---
  +
  +
  +
Example of use:
  +
---------------------
  +
MOVE #%0111101101100101,d0
  +
BTST.B #3,d0 ;Test bit nr°3 of d0
  +
BEQ zero ;Z=1 ?
  +
BNE un ;Z=0 ?
  +
  +
Test the BIT nr°3 of the lower byte of the word
  +
%0111101101100101.
  +
It is equal to 0: Z=1 in the CCR, jump to 'zero'
  +
The bit nr°3 of d0 has been set to 0: d0 remains unchanged
  +
  +
  +
  +
  +
ADDX dm,dn (.B),[.W],(.L) (ADD with eXtend)
  +
--------------
  +
or
  +
  +
ADDX -(am),-(an) (.B),[.W],(.L)
  +
------------------
  +
  +
ADDX is identical to ADD, except here the source operand is increased
  +
by the X bit of the CCR and added to (in) the destination operand.
  +
  +
The X bit of the CCR is a copy of the C bit and is set to 1 if the result
  +
of an operation causes a carry.
  +
This allows for additions with precision greater
  +
than a L-M: two L-Ms can be added with ADDX!
  +
  +
All bits of the CCR are affected by ADDX.
  +
---
  +
NB: To avoid a previous carry interfering with an addition with
  +
-- ADDX, you can set the X bit of the CCR to 0 with MOVE #0,CCR before
  +
the addition.
  +
  +
  +
  +
ABCD.B dm,dn (.B) (ADD Decimal with eXtend)
  +
----------------
  +
or
  +
  +
ABCD.B -(am),-(an) (.B)
  +
--------------------
  +
  +
ABCD is identical to ADD, except here the source operand is increased
  +
by the X bit of the CCR and added to (in) the destination operand.
  +
  +
Only the .B size is allowed.
  +
  +
The X bit of the CCR is a copy of the C bit and is set to 1 if the result
  +
of an operation causes a carry.
  +
  +
The V and N bits of the CCR are not affected by ABCD.
  +
---
  +
The C bit is set to 1 only if there is a Decimal carry.
  +
  +
NB: To avoid a previous carry interfering with an addition with
  +
-- ABCD, you can set the X bit of the CCR to 0 with MOVE #0,CCR before
  +
the addition.
  +
  +
  +
  +
  +
SUBX dm,dn (.B),[.W],(.L) (SUBtract with eXtend)
  +
--------------
  +
or
  +
  +
SUBX -(am),-(an) (.B),[.W],(.L)
  +
------------------
  +
  +
SUBX is identical to SUB, except here the source operand is increased
  +
by the X bit of the CCR and subtracted from (in) the destination operand.
  +
  +
The X bit of the CCR is a copy of the C bit and is set to 1 if the result
  +
of an operation causes a carry.
  +
This allows for subtractions with precision
  +
greater than a L-M: two L-Ms can be subtracted with SUBX!
  +
  +
All bits of the CCR are affected by SUBX.
  +
---
  +
NB: To avoid a previous carry interfering with a subtraction with
  +
-- SUBX, you can set the X bit of the CCR to 0 with MOVE #0,CCR before
  +
the subtraction.
  +
  +
  +
SBCD.B dm,dn (.B) (Subtract Decimal with eXtend)
  +
----------------
  +
or
  +
  +
SBCD.B -(am),-(an) (.B)
  +
--------------------
  +
  +
SBCD is identical to SUB, except here the source operand is increased
  +
by the X bit of the CCR and added to (in) the destination operand.
  +
  +
Only the .B size is allowed.
  +
  +
The X bit of the CCR is a copy of the C bit and is set to 1 if the result
  +
of an operation causes a carry.
  +
  +
The V and N bits of the CCR are not affected by SBCD.
  +
---
  +
The C bit is set to 1 only if there is a Decimal carry.
  +
  +
NB: To avoid a previous carry interfering with a subtraction
  +
-- with SBCD, you can set the X bit of the CCR to 0 with MOVE #0,CCR
  +
before the subtraction.
  +
  +
NEGX source (.B),[.W],(.L) (NEGate with eXtend)
  +
--------------
  +
  +
NEGX is identical to NEG, except that here the source operand is increased
  +
by the X bit of the CCR before being subtracted from 0.
  +
  +
The source operand admits the addressing modes:
  +
------
  +
dn
  +
an
  +
BBBB
  +
BB
  +
(an)
  +
(an)+
  +
-(an)
  +
d(an)
  +
d(an,rn)
  +
  +
The X bit of the CCR is a copy of the C bit and is set to 1 if the result
  +
of an operation causes a carry.
  +
  +
All bits of the CCR are affected by NEGX.
  +
---
  +
NB: To avoid a previous carry interfering with a negation with
  +
-- NEGX, you can set the X bit of the CCR to 0 with MOVE #0,CCR before
  +
the negation.
  +
  +
  +
  +
NBCD.B source (.B) (Negate Decimal with eXtend)
  +
----------------
  +
  +
NBCD is identical to NEG, except that here the source operand is increased
  +
by the X bit of the CCR and then subtracted from 0.
  +
  +
Only the .B size is allowed.
  +
  +
The source operand admits the addressing modes:
  +
------
  +
dn
  +
an
  +
BBBB
  +
BB
  +
(an)
  +
(an)+
  +
-(an)
  +
d(an)
  +
d(an,rn)
  +
  +
The X bit of the CCR is a copy of the C bit and is set to 1 if the result
  +
of an operation causes a carry.
  +
  +
The V and N bits of the CCR are not affected by NBCD.
  +
---
  +
The C bit is set to 1 only if there is a decimal carry.
  +
  +
NB: To avoid a previous carry interfering with a negation with
  +
-- NBCD, you can set the X bit of the CCR to 0 with MOVE #0,CCR before
  +
the negation.
  +
  +
  +
  +
  +
JMP destination (JuMP)
  +
-----------------
  +
  +
JMP allows for a jump to the destination address.
  +
  +
The destination operand admits the addressing modes:
  +
-----------
  +
BBBB
  +
BB
  +
(an)
  +
d(an)
  +
d(an,rn)
  +
d(pc)
  +
d(pc,rn)
  +
  +
  +
The jump is made by loading the current value of the PC with the value
  +
of the PC at the destination address.
  +
  +
The CCR is not affected.
  +
---
  +
  +
Examples of use:
  +
-----------------------
  +
JMP here
  +
or
  +
LEA.L here,a0
  +
JMP (a0)
  +
or
  +
JMP 4(pc)
  +
etc...
  +
  +
  +
  +
BRA Label (BRAnch)
  +
------------
  +
  +
BRA allows for a jump to the address pointed to by the Label
  +
(as with JMP)
  +
  +
The jump is made by loading the current value of the PC with the value
  +
of the PC at the destination address.
  +
  +
The CCR is not affected.
  +
---
  +
  +
Example of use:
  +
----------------------
  +
BRA laurent
  +
  +
  +
  +
JSR Destination (Jump Sub Routine)
  +
------------------
  +
  +
Like JMP, JSR allows for a jump to the address pointed to by
  +
the destination operand.
  +
  +
The destination operand admits the addressing modes:
  +
-----------
  +
BBBB
  +
BB
  +
(an)
  +
d(an)
  +
d(an,rn)
  +
d(pc)
  +
d(pc,rn)
  +
  +
  +
Additionally, the address of the instruction following JSR is placed in
  +
the system stack (SP):
  +
  +
There are 2 types of STACKS:
  +
.The system stack and stacks implemented by the user.
  +
.The system stack is pointed to by the A7 or SP register.
  +
.The difference between these 2 stacks lies in the fact that they are
  +
managed entirely independently.
  +
.If we are in SUPERVISOR MODE, the system stack is available to us.
  +
.If we are in USER MODE, the stack is called the user stack.
  +
  +
The SYSTEM STACK is a particular part of the memory, it is
  +
especially used by jump instructions to deposit
  +
the return address to the instruction.
  +
  +
|--------|--------|
  +
|--------|--------| SYSTEM
  +
|--------|--------| STACK
  +
|--------|--------|
  +
  +
Data can be stored in this stack. (this is how, for example,
  +
parameters are passed to functions of the Bios,Xbios,Gemdos)
  +
  +
Storing data in the System Stack is done:
  +
  +
.Either by predecrementing the stack pointer SP ( -(sp) )
  +
  +
- In this case, reading the data will be done by mode (sp)+
  +
  +
.Or by postincrementing the stack pointer SP ( (sp)+ )
  +
  +
- In this case, reading the data will be done by mode -(sp)
  +
  +
  +
NB: I remind you that the SP (Stack Pointer) must only point
  +
-- to EVEN addresses!
  +
The decrementation or incrementation of SP by 1 unit will therefore
  +
be prohibited.
  +
  +
  +
Example of data stacking in predecrement mode:
  +
-------
  +
MOVE #5-(sp) ;5=%101
  +
MOVE #3-(sp) ;3=%11
  +
  +
We obtain:
  +
  +
|--------|--------|
  +
SP ----->|00000000|00000011| /|\ Data is stacked
  +
|00000000|00000101| | in mode -(SP)
  +
SP before>|--------|--------|
  +
  +
SP was decremented by 4 units ( -(sp) 2 times with .W )
  +
  +
  +
MOVE (sp)+,d0
  +
MOVE (sp)+,d1
  +
  +
We obtain:
  +
  +
|--------|--------|
  +
SP before>|00000000|00000011| | Data is unstacked
  +
|00000000|00000101| \|/ in mode (SP)+
  +
SP ----->|--------|--------|
  +
  +
SP was incremented by 4 units ( (sp)+ 2 times with .W )
  +
  +
d0 will contain the WORD 3
  +
d1 will contain the WORD 5
  +
  +
SP regains its initial value after unstacking the data.
  +
  +
NB: It will be important to ensure that the SP is restored to its
  +
-- initial value after using the SYSTEM STACK because the size of that
  +
stack is limited.
  +
  +
  +
But let's get back to JSR: We have seen that the instruction
  +
deposits the address of the next instruction following JSR into the
  +
system stack before performing a jump to the destination address.
  +
  +
SP is therefore decremented by 4 units (because an address is contained
  +
in a L-M)
  +
  +
The system stack will therefore look like this after a JSR:
  +
  +
|--------|--------|
  +
SP ----->|XXXXXXXX|XXXXXXXX| /|\ The return address
  +
|XXXXXXXX|XXXXXXXX| | after JSR is pointed to by
  +
SP before>|--------|--------| SP which was decremented by
  +
4 units ( -(SP) with .L )
  +
  +
  +
This address will later be unstacked at the end of the subroutine
  +
by a specific instruction and will be loaded into the PC:
  +
This will cause the return to the instruction following JSR.
  +
  +
JSR differs from JMP in that JSR saves the address of the
  +
next instruction that follows it in the system stack, so that
  +
it is possible to return to this address after having jumped
  +
to the destination address of JSR.
  +
  +
  +
  +
BSR label (Branch Sub Routine)
  +
-------------
  +
  +
BSR is identical to JSR, except that some assemblers allow setting
  +
the length of the displacement (BRA.S (Word) or BRA.L (L-M) )
  +
  +
(This is of no real interest to us ...)
  +
  +
  +
RTS (ReTurn from Subroutine)
  +
---
  +
  +
RTS, as its name suggests, is the instruction that marks the end of the
  +
subroutine and operates a jump to the next instruction that
  +
follows the calling JSR instruction.
  +
  +
RTS unstacks (by post-increment mode) the address deposited by JSR and loads
  +
it into the PC: this causes a jump to the address
  +
that follows JSR.
  +
  +
SP thus regains its initial value.
  +
  +
The CCR is not affected by RTS.
  +
---
  +
  +
Example of use:
  +
----------------------
  +
MOVE #3,d0 ;word 3 in d0
  +
MOVE #8,d1 ;word 8 in d1
  +
JSR add ;Call to the subroutine 'add'
  +
MOVE d0,resu ;puts the lower word of d0 in 'resu'
  +
  +
...... ;it's assumed here is an instruction
  +
;that stops the program to prevent
  +
;going further...
  +
  +
add ADD d1,d0 ;subroutine 'add'
  +
RTS ;end of subroutine, return ^
  +
  +
BSS
  +
  +
resu DS.W 1 ;reserves one word
  +
  +
END
  +
  +
In 'resu', the WORD 8+3=11 will be found
  +
  +
  +
  +
  +
RTR (ReTurn & Restore CCR)
  +
---
  +
RTR is identical to RTS except that RTR:
  +
  +
.Unstacks 1 WORD from the system stack by post-increment mode and places
  +
it in the CCR.
  +
  +
.Unstacks 1 L-M from the system stack by post-increment mode and places
  +
it in the PC, just like RTS.
  +
  +
It will be necessary that the first 3 WORDS pointed by SP
  +
correspond to the needs of RTR.
  +
  +
  +
Example of use:
  +
----------------------
  +
MOVE #3,d0 ;3 in d0
  +
MOVE d0,d1 ;d0 in d1
  +
JSR test ;goes to the subroutine 'test' and places the address of the
  +
;next instruction in SP.
  +
MOVE #1,d3
  +
  +
.......... ;end of program execution to not go further
  +
  +
test MOVE sr,-(sp) ;subroutine 'test': places the SR (word) in the stack
  +
;(the stack therefore contains at its top the SR (word)
  +
;then the address placed by JSR (l-m) )
  +
SUB d0,d1 ;subtracts d0 from d1: d0=d1, the Z bit of the CCR is
  +
;set to 1. (before SUB it was 0)
  +
RTR ;unstacks the SR then the address placed by JSR and
  +
;returns
  +
  +
After returning from the subroutine, the Z bit of the CCR will be null because
  +
RTR has restored the SR that we deposited before the subtraction ...
  +
  +
  +
  +
MOVEM registers/registers,destination [.W],(.L)
  +
---------------------------------------
  +
or
  +
  +
MOVEM source,registers/registers [.W],(.L)
  +
----------------------------------
  +
  +
MOVEM allows for saving (1st form) or restoring (2nd form) the
  +
an and dn registers.
  +
  +
Only the .W or .L sizes are allowed.
  +
  +
For the 1st form:
  +
----------------
  +
The destination operand admits the addressing modes:
  +
-----------
  +
BBBB
  +
BB
  +
(an)
  +
-(an)
  +
d(an)
  +
d(an,rn)
  +
d(pc)
  +
d(pc,rn)
  +
  +
The addressing mode -(an) is commonly used, in this case, the
  +
registers are stacked in memory by decreasing addresses, in
  +
the order: a7->a0, d7->d0
  +
  +
If the source operand is of the type: d0-d7/a0-a7, all registers are
  +
transferred.
  +
  +
Otherwise, the first DN register and the last DM register to
  +
transfer (separated by the - sign) then the first AN register and the last
  +
AM register to transfer (separated by the - sign) are indicated.
  +
Moreover:
  +
The DN and AN registers are separated by the / sign in the source operand.
  +
  +
NB: The form dn-dm/an-am is identical to the form an-am/dn-dm for
  +
-- the source operand.
  +
(just as the form d0/d1/a0 is identical to the form d0-d1/a0)
  +
  +
The destination data register an is therefore decremented by a number
  +
equal to the size x of MOVEM.x (2 if .W,4 if .L) multiplied by the
  +
total number of registers to transfer.
  +
  +
Exp: MOVEM.L d3-d5/a0-a2,-(SP)
  +
---
  +
The registers a2, a1, then d5, d4, d3 are stacked in the system stack.
  +
SP is decremented by 6*4=24 units and points to d3, the last
  +
stacked register.
  +
  +
MOVEM.L a5-a7,-(SP)
  +
  +
The registers a7, a6, a5 are stacked in the system stack.
  +
SP is decremented by 3*4=12 units and points to a5, the last
  +
stacked register.
  +
  +
MOVEM.W d3/a0-a1,-(SP)
  +
  +
The lower words of registers a1, a0, d3 are stacked in the system
  +
stack.
  +
SP is decremented by 3*2=6 units and points to the lower word
  +
of d3, the last stacked word.
  +
  +
  +
  +
For the 2nd form:
  +
-----------------
  +
The source operand admits the addressing modes:
  +
------
  +
BBBB
  +
BB
  +
(an)
  +
(an)+
  +
d(an)
  +
d(an,rn)
  +
d(pc)
  +
d(pc,rn)
  +
  +
The addressing mode (an) is commonly used, in this case, the
  +
registers are unstacked from memory by increasing addresses, and
  +
put back into the registers in the order: d0->d7, a0->a7
  +
  +
If the source operand is of the type: d0-d7/a0-a7, all registers are
  +
modified.
  +
  +
Otherwise, the first DN register and the last DM register to
  +
load (separated by the - sign) then the first AN register and the last
  +
AM register to load (separated by the - sign) are indicated.
  +
Moreover:
  +
The DN and AN registers are separated by the / sign in the source operand.
  +
  +
NB: The form dn-dm/an-am is identical to the form an-am/dn-dm for
  +
-- the source operand.
  +
(just as the form d0/d1/a0 is identical to the form d0-d1/a0)
  +
  +
The destination data register an is therefore incremented by a number
  +
equal to the size x of MOVEM.x (2 if .W,4 if .L) multiplied by the
  +
total number of registers to modify.
  +
The destination register an thus regains its initial value after the
  +
loading of the registers.
  +
CAUTION, it will be necessary to ensure that the necessary data is
  +
present at the indicated address.
  +
  +
Exp: MOVEM.L (SP)+,d3-d5/a0-a2
  +
---
  +
The L-Ms pointed by SP are unstacked and copied into d3, d4, d5 then
  +
a0, a1, a2.
  +
In the system stack, SP is incremented by 6*4=24 units.
  +
  +
MOVEM.L (SP)+,a5-a7
  +
  +
The L-Ms pointed by SP are unstacked and copied into the registers a5,
  +
a6, a7.
  +
In the system stack, SP is incremented by 3*4=12 units.
  +
  +
MOVEM.W (SP)+,d3/a0-a1
  +
  +
The words pointed by SP are unstacked into the lower words of the
  +
registers d3, a0, a1.
  +
In the system stack, SP is incremented by 3*2=6 units.
  +
  +
  +
  +
MOVEM does not influence the CCR.
  +
---
  +
  +
Example of use:
  +
----------------------
  +
MOVE #3,d0 ;word 3 in d0
  +
MOVE #4,d1 ;word 4 in d1
  +
MOVEM.L d0-d1,-(SP) ;saving d0 and d1 (see diagram 1)
  +
ADD d0,d1 ;d1=d0+d1=3+4=7
  +
MOVEM.L (SP)+,d0-d1 ;restoring d0 and d1 (see diagram 2)
  +
  +
Finally: we have d0=3 and d1=4 at the end of the program because the registers d0 and
  +
d1 have been saved and then reloaded.
  +
  +
diagram 1:
  +
---------
  +
MOVEM.L d0-d1,-(SP)
  +
  +
The L-Ms of d1=4=%100 and then d0=3=%11 are STACKED in the System Stack:
  +
  +
  +
|--------|--------|
  +
|--------|--------|
  +
|--------|--------| STACK
  +
SP after the 2--->|00000000|00000000| SYSTEM
  +
decrements |00000000|00000011|
  +
|00000000|00000000|
  +
|00000000|00000100|
  +
SP before ---->|--------|--------|
  +
  +
  +
diagram 2:
  +
---------
  +
MOVEM.L (SP)+,d0-d1
  +
  +
We UNSTACK the L-M pointed by SP during the increments and
  +
place them into d0 and d1.
  +
  +
|--------|--------|
  +
|--------|--------|
  +
|--------|--------| STACK
  +
SP before ----->|00000000|00000000| SYSTEM
  +
|00000000|00000011|
  +
|00000000|00000000|
  +
|00000000|00000100|
  +
SP after the 2 -->|--------|--------|
  +
increments (.L)
  +
  +
MOVEP dn,d(an) [.W],(.L)
  +
----------------
  +
or
  +
  +
MOVEP d(an),dn [.W],(.L)
  +
---------------
  +
  +
MOVEP allows saving (1st form) or reloading (2nd form) a
  +
data register dn (its least significant word for MOVEP.W or the
  +
entire register for MOVEP.L) pointed by an addressing mode of
  +
type indirect with displacement d(an).
  +
  +
MOVEP is a very particular instruction because the data register
  +
dn is saved (or loaded) in the following way:
  +
  +
For MOVEP.W:
  +
  +
The least significant byte of dn is saved or loaded from the
  +
address pointed by d(an) (or d(an)+1 if this address was
  +
ODD)
  +
  +
The most significant byte of dn is saved or loaded from the
  +
address pointed by d(an)+2 (or d(an)+3 if this address was
  +
ODD)
  +
  +
For MOVEP.L
  +
  +
The least significant byte of dn is saved or loaded from the
  +
address pointed by d(an) (or d(an)+1 if this address was
  +
ODD)
  +
  +
The most significant byte of the least significant word of dn is saved or
  +
loaded from the address pointed by d(an)+2 (or d(an)+3 if this
  +
address was ODD)
  +
  +
The least significant byte of the most significant word of dn is saved or
  +
loaded from the address pointed by d(an)+4 (or d(an)+5 if this
  +
address was ODD)
  +
  +
The most significant byte of dn is saved or loaded from the
  +
address pointed by d(an)+6 (or d(an)+7 if this address was
  +
ODD)
  +
  +
IN SUMMARY:
  +
----------
  +
MOVEP.L dn,d(an): If d(an) points to an EVEN address.
  +
----- -----
  +
  +
BYTES MEMORY
  +
------ -------
  +
most significant
  +
dn: ******** -------> d(an) even
  +
-- d(an)+1 odd
  +
******** -------> d(an)+2 even
  +
d(an)+3 odd
  +
******** -------> d(an)+4 even
  +
d(an)+5 odd
  +
******** -------> d(an)+6 even
  +
least significant
  +
  +
  +
  +
MOVEP.L dn,d(an): If d(an) points to an ODD address.
  +
----- -------
  +
  +
BYTES MEMORY
  +
------ -------
  +
most significant
  +
dn: ******** -------> d(an)+1 even
  +
-- d(an)+2 odd
  +
******** -------> d(an)+3 even
  +
d(an)+4 odd
  +
******** -------> d(an)+5 even
  +
d(an)+6 odd
  +
******** -------> d(an)+7 even
  +
least significant
  +
  +
  +
MOVEP always places a data register in memory
  +
on EVEN addresses.(By alternating 'empty' bytes and bytes
  +
contained in dn which are always located at even addresses)
  +
  +
  +
MOVEP does not affect the CCR.
  +
---
  +
  +
Example of use:
  +
----------------------
  +
MOVE.L #%00000000000000001111111100000001,d0
  +
LEA aa,a0
  +
MOVEP d0,0(a0)
  +
  +
BSS
  +
  +
aa DS.B 43
  +
  +
  +
'aa' is an even address (BSS initializes PC) at 0(a0) we therefore find
  +
the most significant byte of d0 which is %00000000.
  +
'aa'+1 is an odd address.
  +
'aa'+2 is an even address, at 2(a0) we find the least significant byte
  +
of the most significant word of d0 which is %00000000
  +
'aa'+3 is an odd address
  +
'aa'+4 is an even address, at 4(a0) we find the most significant byte
  +
of the least significant word of d0 which is %11111111
  +
'aa'+5 is an odd address
  +
'aa'+6 is an even address, at 6(a0) we find the least significant byte
  +
of d0 which is %00000001
  +
  +
All these bytes are located at even addresses.
  +
  +
  +
  +
PEA source (Push Effective Address)
  +
--------------
  +
  +
PEA places the address of the source operand in the system stack as an
  +
L-M, thus SP will be decremented by 4 units.
  +
  +
The source operand admits the following addressing modes:
  +
------
  +
BBBB
  +
BB
  +
(an)
  +
d(an)
  +
d(an,rn)
  +
d(pc)
  +
d(pc,rn)
  +
  +
The CCR is not affected by PEA.
  +
---
  +
Example of use:
  +
----------------------
  +
PEA eee ;places the address pointed by the label 'eee' in the
  +
;system stack. (see 1°)
  +
MOVE.L (SP)+,a0 ;unstacks the L-M pointed by SP and places it in a0
  +
;(see 2°)
  +
JMP (a0) ;jumps to the address pointed by a0 (thus in 'eee')
  +
  +
MOVE #4,d0
  +
  +
eee MOVE #3,d1
  +
  +
END
  +
  +
Finally: d1=3 and d0 is unused.
  +
  +
1°) The system stack will thus look like this after a PEA:
  +
---
  +
|--------|--------|
  +
SP ----->|XXXXXXXX|XXXXXXXX| /|\ The address (L-M) of the source
  +
|XXXXXXXX|XXXXXXXX| | operand is stacked in the system
  +
SP before>|--------|--------| stack: SP is therefore decremented
  +
by 4 units (-(SP) with .L)
  +
  +
  +
2°) The system stack will then look like this after MOVE.L (SP)+,a0
  +
---
  +
|--------|--------|
  +
SP before>|XXXXXXXX|XXXXXXXX| | The address (L-M) pointed
  +
|XXXXXXXX|XXXXXXXX| \|/ by SP is placed in a0.
  +
SP ----->|--------|--------| SP which has been incremented by
  +
4 units ((SP)+ with .L)
  +
  +
a0=XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX (the address placed by PEA)
  +
  +
  +
  +
------------------
  +
  +
  +
PIECHOCKI Laurent
  +
8,impasse Bellevue Continue in file INSTRUC3.DOC
  +
57980 TENTELING ------------
  +
  +
</pre>
  +
  +
Back to [[ASM_Tutorial]]
  +
[[Category: 68000 ASSEMBLY ON ATARI ST Part 1 ]]

Latest revision as of 12:53, 17 December 2023

Languages: 

English  • français 

CONTINUATION OF THE COURSE ON INSTRUCTIONS from the INSTRUC.DOC file
----------------------------------------------------------

   LSL    #BBB,dn   (.B),[.W],(.L)             (Logical Shift Left)
   --------------
   or

   LSL      dm,dn   (.B),[.W],(.L)
   --------------
   or 

   LSL.W  destination  (.W)
   ------------------

   Performs a shift of #BBB or dm (depending on the syntax) BITS
   of the data register dn to the left.
   The replacement bits are ZEROS.

   It is necessary that 1<= #BBB <= 8 for the 1st form.
                         -------------

   For the 3rd form, the allowed addressing modes for the
   destination operand are:
   -----------
   BBBB
   BB
   (an)
   -(an)
   (an)+
   d(an)
   d(an,rn)

   But in this case, the operation can only shift
   1 SINGLE BIT.

   For example, if d0=%10000101110001101111011100000110 (word)
   ------
   And if I write LSL.W #1,dn 

               or MOVE.W #1,d1
                  LSL.W d1,d0, we get: 

                            d0=%00001011100011011110111000001100 
                                <--------                       <--:0    

   All the bits of the lower WORD of the data register dn (.W)
   have been shifted by 1 bit to the left:

   The least significant bit entering is always replaced by a
   NULL bit.
   
   Meaning: #BBB or dm BITS are shifted out of dn to the left and the
   replacement bits entering on the right of dn are NULL BITS.

   The contents of dn are therefore changed, the MSB is also likely to change,
   that's why the SIGN of dn may not necessarily be preserved.

   The CCR will change according to the new value of dn.
      ---
   N=1 if the MSB is 1, otherwise it is 0
   Z=1 if all bits of dn are null, otherwise it is 0
   V is always set to 0
   C and X are set to the value of the LAST BIT EXITED from dn.
    

   Example of use:
   ----------------------
   MOVE     #%1111111101010101,d0  
   LSL.B    #5,d0

   A shift of 5 bits of the lower BYTE of d0 is operated
   (only bits 0 to 7 of d0 are therefore concerned by lsl.B)

   We get: 
 
   CCR        --------<------<:0
 
   X=C=0  <-  1111111110100000 in d0   

   5 null bits have entered the right of the lower byte of d0, the
   last bit to exit from d0 was null: bit X=C=0 in the CCR




   LSR    #BBB,dn   (.B),[.W],(.L)             (Logical Shift Right)
   --------------
   or

   LSR      dm,dn   (.B),[.W],(.L)
   --------------
   or

   LSR.W  destination (.W)
   ------------------

   Performs a shift of #BBB or dm (depending on the syntax) BITS
   of the data register dn to the right.
   The replacement bits are ZEROS.

   It is necessary that 1<= #BBB <= 8 for the 1st form.
                         -------------   
   For the 3rd form, the allowed addressing modes for the
   destination operand are:
   -----------
   BBBB
   BB
   (an)
   -(an)
   (an)+
   d(an)
   d(an,rn)
   
   But in this case, the operation can only shift
   1 SINGLE BIT.

   For example, if d0=%10000101110001101111011100000110 (word)
   ------
   And if I write LSR.W #1,dn 

               or MOVE.W #1,d1
                  LSR.W d1,d0, we get: 

                            d0=%01000010111000110111101110000011 
                           0:-->                        ------->   

   All the bits of the lower WORD of the data register dn (.W)
   have been shifted by 1 bit to the right:

   The most significant bit entering is always replaced by a 
   NULL bit.
   
   Meaning: #BBB or dm BITS are shifted out of dn to the right and the
   replacement bits entering on the left of dn are NULL BITS.

   The contents of dn are therefore changed, the MSB is also likely to change,
   that's why the SIGN of dn may not necessarily be preserved.

   The CCR will change according to the new value of dn.
      ---
   N=1 if the MSB is 1, otherwise it is 0
   Z=1 if all bits of dn are null, otherwise it is 0
   V is always set to 0
   C and X are set to the value of the LAST BIT EXITED from dn.
    

   Example of use:
   ----------------------  
   MOVE     #%1111111101010101,d0  
   LSR.B    #5,d0

   A shift of 5 bits of the lower BYTE of d0 is operated.
   (only bits 0 to 7 of d0 are therefore concerned by lsr.B)

   We get: 
 
       ------0:>------>     CCR
 
   d0 :1111111100000010  -> X=C=1         

   5 null bits have entered the left of the lower byte of d0, the
   last bit to exit from d0 was 1: bit X=C=1 in the CCR

   ASL    #BBB,dn   (.B),[.W],(.L)             (Arithmetic Shift Left)
   --------------
   or

   ASL      dm,dn   (.B),[.W],(.L)
   --------------
   or

   ASL.W  destination  (.W)
   ------------------

   This instruction is identical to LSL.

   However, with ASL, the V bit of the CCR is set to 1 if the MSB of the
   destination operand is changed.
   ---



   
   ASR    #BBB,dn   (.B),[.W],(.L)             (Arithmetic Shift Right)
   --------------
   or

   ASR      dm,dn   (.B),[.W],(.L)
   --------------
   or

   ASR.W  destination  (.W)
   ------------------

   Performs a shift of #BBB or dm (depending on the syntax) BITS
   of the data register dn to the right.
   The replacement bits are equal to the most significant bit.

   It is necessary that 1<= #BBB <= 8 for the 1st form.
                         -------------   
   For the 3rd form, the allowed addressing modes for the
   destination operand are:
   -----------
   BBBB
   BB
   (an)
   -(an)
   (an)+
   d(an)
   d(an,rn)
   
   But in this case, the operation can only rotate
   1 SINGLE BIT.

   For example, if d0=%10000101110001101111011100000110 (word)
   ------  
                              MSB=1
                  
   And if I write ASR.W #1,dn 

               or MOVE.W #1,d1
                  ASR.W d1,d0, we get: 

                              d0=%11000010111000110111101110000011 
                         MSB=1:-->                        ------->   


   All the bits of the lower WORD of the data register dn (.W)
   have been shifted by 1 bit to the right:

   The least significant bit exits on the right.  
   The replacement bit is identical to the MSB preceding the rotation.
   
   Meaning: #BBB or dm BITS are shifted out of dn to the right and they
   enter bits equal to the most significant bit on the left, in place
   of the missing bit.
   
   The contents of dn are therefore changed but its SIGN is PRESERVED because the
   MSB remains unchanged.

   The CCR will change according to the new value of dn.
      ---
   N=1 if the MSB is 1, otherwise it is 0
   Z=1 if all bits of dn are null, otherwise it is 0
   V is set to 1 if the MSB of the destination operand has been changed.
   C and X are set to the value of the LAST BIT EXITED from dn.
    

   Example of use:
   ----------------------  
   MOVE     #%1111111101010101,d0  
   ASR.W    #5,d0

   bit nr°15=1

   A shift of 5 bits of the lower WORD of d0 is operated.
   (only bits 0 to 15 of d0 are therefore concerned by asr.W)

   We get: 
 
   MSB>--------------->     CCR
 
   d0 :1111111111111010  -> X=C=1 at the end        

   5 bits are shifted out to the right of the lower WORD of d0 and we
   placed successively 5 bits equal to 1 (bit nr°15=1) in place of the
   most significant bit of the WORD.
   The sign of d0 remains preserved.

   The last bit to exit from d0 was equal to 1:
   the bit X=C=1 in the CCR




   ROL    #BBB,dn   (.B),[.W],(.L)             ROtate Left
   --------------
   or

   ROL      dm,dn   (.B),[.W],(.L)
   --------------
   or

   ROL.W  destination  (.W)
   ------------------

   Performs a ROTATION of #BBB or dm (depending on the syntax) BITS
   of the data register dn to the left.
   The replacement bits are equal to those that just exited.

   It is necessary that 1<= #BBB <= 8 for the 1st form.
                         -------------   
   For the 3rd form, the allowed addressing modes for the
   destination operand are:
   -----------
   BBBB
   BB
   (an)
   -(an)
   (an)+
   d(an)
   d(an,rn)
   
   But in this case, the operation can only rotate
   1 SINGLE BIT.

   For example, if d0=%10000101110001101111011100000110 (word)
   ------
                  
   And if I write ROL.W #1,dn 

               or MOVE.W #1,d1
                  ROL.W d1,d0, we get: 

                              d0=%00001011100011011110111000001101 
                            <-----                                <:1


   All the bits of the lower WORD of the data register dn (.W)
   have been rotated by 1 bit to the left:

   The most significant bit exits on the left and returns on the
   right. (rotation)
   
   Meaning: #BBB or dm BITS are rotated out of dn on the left and they
   re-enter on the right, in place of the missing bits.
      
   The contents of dn are therefore changed, the MSB is also likely to be
   changed: the sign of the register is therefore not necessarily preserved.

   The CCR will change according to the new value of dn.
      ---
   N=1 if the MSB is 1, otherwise it is 0
   Z=1 if all bits of dn are null, otherwise it is 0
   V is set to 1 if the MSB of the destination operand has been changed.
   C is set to the value of the LAST BIT EXITED from dn.
   X is not affected. 

   Example of use:
   ----------------------  
   MOVE     #%1111111101010101,d0  
   ROL.B    #5,d0


   A rotation of 5 bits of the lower BYTE of d0 is operated.
   (only bits 0 to 7 of d0 are therefore concerned by rol.B)

   We get: 
 
       -------C<------<:C     CCR
 
   d0 :1111111110101010  ->   C=0 at the end        

   5 bits are rotated out to the left of the lower byte of d0 and were
   replaced with bits equal to the least significant bit of the byte.   

   The last bit to exit from d0 was equal to 0:
   the bit C=0 in the CCR

   ROR    #BBB,dn   (.B),[.W],(.L)             ROtate Right
   --------------
   or

   ROR      dm,dn   (.B),[.W],(.L)
   --------------
   or

   ROR.W  destination  (.W)
   ------------------

   Performs a ROTATION of #BBB or dm (depending on the syntax) BITS
   of the data register dn to the right.
   The replacement bits are equal to those that just exited.

   It is necessary that 1<= #BBB <= 8 for the 1st form.
                         -------------   
   For the 3rd form, the allowed addressing modes for the
   destination operand are:
   -----------
   BBBB
   BB
   (an)
   -(an)
   (an)+
   d(an)
   d(an,rn)
   
   But in this case, the operation can only rotate
   1 SINGLE BIT.

   For example, if d0=%10000101110001101111011100000110 (word)
   ------
                  
   And if I write ROR.W #1,dn 

               or MOVE.W #1,d1
                  ROR.W d1,d0, we get: 

                              d0=%01000010111000110111101110000011 
                               -->                                --->  


   All the bits of the lower WORD of the data register dn (.W)
   have been rotated by 1 bit to the right:

   The least significant bit exits on the right and returns on the
   left. (rotation)
   
   Meaning: #BBB or dm BITS are rotated out of dn to the right and they
   re-enter on the left, in place of the missing bits.
      
   The contents of dn are therefore changed, the MSB is also likely to be
   changed: the sign of the register is therefore not necessarily preserved.

   The CCR will change according to the new value of dn.
      ---
   N=1 if the MSB is 1, otherwise it is 0
   Z=1 if all bits of dn are null, otherwise it is 0
   V is set to 1 if the MSB of the destination operand has been changed.
   C is set to the value of the LAST BIT EXITED from dn.
   X is not affected. 

   Example of use:
   ----------------------
   MOVE     #%1111111101010101,d0  
   ROR.B    #5,d0


   A rotation of 5 bits of the lower BYTE of d0 is operated.
   (only bits 0 to 7 of d0 are therefore concerned by ror.B)

   We get: 
 
       -------C>------>:C       CCR
 
   d0 :1111111110101010  ->   C=1 at the end        

   5 bits are rotated out to the right of the lower byte of d0 and were
   replaced with bits equal to the most significant bit of the byte.   

   The last bit to exit from d0 was equal to 1:
   the bit C=1 in the CCR


   
   ROXL   #BBB,dn   (.B),[.W],(.L)             ROtate Left with eXtend
   --------------
   or

   ROXL     dm,dn   (.B),[.W],(.L)
   --------------
   or

   ROXL.W  destination  (.W)
   -------------------

 

   ROXL is identical to ROL except that here the X bit of the CCR is (like
   the C bit) loaded with the last bit that just exited and
   it is copied in place of the missing bit.



   ROXR   #BBB,dn   (.B),[.W],(.L)             ROtate Right with eXtend
   --------------
   or

   ROXR     dm,dn   (.B),[.W],(.L)
   --------------
   or

   ROXR.W  destination  (.W)
   -------------------


   ROXR is identical to ROR except that here the X bit of the CCR is (like
   the C bit) loaded with the last bit that just exited and
   it is copied in place of the missing bit.


  

   BTST   source,dn  (.B),[.W],(.L)         (TeST a Bit)
   ----------------
   or
 
   BTST  source,destination   (.B),[.W],(.L)
   ------------------------

   Tests the value (0 or 1) of a BIT.

   If the BIT is NULL: the Z bit of the CCR is set to 1
                        -                -    
   If the BIT is ACTIVE: the Z bit of the CCR is set to 0
                          -                -     

   For the first form:
           -------------- 
   The source operand indicates the BIT number to test, it admits the
   addressing modes:           --

   dn
   #BBB  
 
  (with 0<= NR° <=32, modulo 32)
       
   The destination operand is a data register.
              -----------      
   For the second form:
           -------------
   The source operand indicates the BIT number to test, it admits the
   addressing modes:           --   

   dn
   #BBB

   (with 0<= NR° <=32, modulo 32)

   The destination operand indicates the data to process, it admits the
   addressing modes:

   dn
   BBBB
   BB
   (an)
   -(an)
   (an)+
   d(an)
   d(an,rn)
   d(pc)
   d(pc,rn)


   Apart from the Z bit of the CCR, the bits of the CCR are not affected by 
   the instruction.     ---   


   Example of use:
   ----------------------  
   MOVE     #%0111101101100101,d0 
   BTST.B   #3,d0                  ;Test the bit nr°3 of d0
   BEQ      zero                   ;Z=1 ?
   BNE      un                     ;Z=0 ?

   The BIT nr°3 of the lower byte of the word
   %0111101101100101 is tested.
   It is equal to 0: Z=1 in the CCR, we jump to 'zero'



   BSET   source,dn  (.B),[.W],(.L)         (test a Bit and SET)
   ----------------
   or
 
   BSET  source,destination   (.B),[.W],(.L)
   ------------------------

   Tests the value (0 or 1) of a BIT.

.   If the BIT is NULL: the Z bit of the CCR is set to 1
                        -               -   
.   If the BIT is ACTIVE: the Z bit of the CCR is set to 0
                          -                -           
.   After the test, the concerned BIT is set to 1
                         ---              -------

   For the first form:
           --------------
   The source operand indicates the BIT number to test, it admits the
   addressing modes:           --   

   dn
   #BBB  
 
  (with 0<= NR° <=32, modulo 32)
       
   The destination operand is a data register.
              -----------        ------------------   
   For the second form:
           -------------
   The source operand indicates the BIT number to test, it admits the
   addressing modes:           --   

   dn
   #BBB

   (with 0<= NR° <=32, modulo 32)

   The destination operand indicates the data to process, it admits the
   addressing modes:

   dn
   BBBB
   BB
   (an)
   -(an)
   (an)+
   d(an)
   d(an,rn)


   Apart from the Z bit of the CCR, the bits of the CCR are not affected by 
   the instruction.     ---


   Example of use:
   ---------------------  
   MOVE     #%0111101101100101,d0 
   BSET.B   #3,d0                  ;Test the bit nr°3 of d0 and SET to 1
   BEQ      zero                   ;Z=1 ?
   BNE      un                     ;Z=0 ?

   The BIT nr°3 of the lower byte of the word
   %0111101101100101 is tested.
   It is equal to 0: Z=1 in the CCR, we jump to 'zero'.
   The bit nr°3 has been set to 1: thus d0=%0111101101101101




   BCHG   source,dn  (.B),[.W],(.L)         (Bit CHanGe)
   ----------------
   or
 
   BCHG  source,destination   (.B),[.W],(.L)
   ------------------------

   Tests the value (0 or 1) of a BIT.

   If the BIT is NULL: the Z bit of the CCR is set to 1

   If the BIT is ACTIVE: the Z bit of the CCR is set to 0

   After the test, the concerned bit is changed to its opposite:
 
 .  0 if it was equal to 1
 .  1 if it was equal to 0
 
   For the first form:
           --------------
   The source operand indicates the BIT number to test, it admits the
   addressing modes:           --

   dn
   #BBB  
 
  (with 0<= NR° <=32, modulo 32)
       
    The destination operand is a data register.
              -----------        ------------------
   For the second form:
           -------------    
   The source operand indicates the BIT number to test, it admits the
   addressing modes:           --

   dn
   #BBB

   (with 0<= BIT number <=32, modulo 32)

   The destination operand indicates the data to be processed, it admits
   the addressing modes:

   dn
   BBBB
   BB

   (an)
   -(an)
   (an)+
   d(an)
   d(an,rn)


   Apart from the Z bit of the CCR, the bits of the CCR are not affected by 
   the instruction.     ---


   Example of use:
   ----------------------  
   MOVE     #%0111101101100101,d0 
   BTST.B   #3,d0                  ;Test bit nr°3 of d0
   BEQ      zero                   ;Z=1 ?
   BNE      un                     ;Z=0 ?

   Test the BIT nr°3 of the lower byte of the word
   %0111101101100101.
   It is equal to 0: Z=1 in the CCR, jump to 'zero'.
   The bit nr°3 has been changed to its opposite: therefore, d0=%0111101101101101


   BCLR   source,dn  (.B),[.W],(.L)         (Bit CLeaR)
   ----------------
   or
 
   BCLR  source,destination   (.B),[.W],(.L)
   ------------------------

   Tests the value (0 or 1) of a BIT.

   .  If the BIT is NULL:   the Z bit of the CCR is set to 1
                       ---           -                  - 
   .  If the BIT is ACTIVE: the Z bit of the CCR is set to 0
                       -----         -                  -  
   .  After the test, the concerned bit is set to 0.
                         ---               -------   

   For the first form:
           --------------
   The source operand indicates the BIT number to test, it admits the
   addressing modes:           --

   dn
   #BBB  
 
  (with 0<= BIT number <=32,  modulo 32)
       
   The destination operand is a data register.
              -----------        ------------------  
   For the second form:
           -------------
   The source operand indicates the BIT number to test, it admits the
   addressing modes:           --

   dn
   #BBB

   (with 0<= BIT number <=32,  modulo 32)

   The destination operand indicates the data to process, it admits 
   the addressing modes:

   dn
   BBBB
   BB
   (an)
   -(an)
   (an)+
   d(an)
   d(an,rn)


   Apart from the Z bit of the CCR, the bits of the CCR are not affected by 
   the instruction.     ---


   Example of use:
   ---------------------
   MOVE     #%0111101101100101,d0 
   BTST.B   #3,d0                  ;Test bit nr°3 of d0
   BEQ      zero                   ;Z=1 ?
   BNE      un                     ;Z=0 ?

   Test the BIT nr°3 of the lower byte of the word
   %0111101101100101.
   It is equal to 0: Z=1 in the CCR, jump to 'zero'
   The bit nr°3 of d0 has been set to 0: d0 remains unchanged



  
   ADDX     dm,dn     (.B),[.W],(.L)        (ADD with eXtend)
   --------------
   or
 
   ADDX   -(am),-(an) (.B),[.W],(.L) 
   ------------------

   ADDX is identical to ADD, except here the source operand is increased
   by the X bit of the CCR and added to (in) the destination operand.

   The X bit of the CCR is a copy of the C bit and is set to 1 if the result
   of an operation causes a carry.
   This allows for additions with precision greater
   than a L-M: two L-Ms can be added with ADDX!
 
   All bits of the CCR are affected by ADDX.
                    ---
   NB: To avoid a previous carry interfering with an addition with
   --  ADDX, you can set the X bit of the CCR to 0 with MOVE #0,CCR before  
       the addition.


  
   ABCD.B     dm,dn       (.B)        (ADD Decimal with eXtend)
   ----------------
   or
 
   ABCD.B   -(am),-(an)   (.B)
   --------------------

   ABCD is identical to ADD, except here the source operand is increased
   by the X bit of the CCR and added to (in) the destination operand.

   Only the .B size is allowed.

   The X bit of the CCR is a copy of the C bit and is set to 1 if the result
   of an operation causes a carry.

   The V and N bits of the CCR are not affected by ABCD.
                         ---
   The C bit is set to 1 only if there is a Decimal carry.

   NB: To avoid a previous carry interfering with an addition with
   --  ABCD, you can set the X bit of the CCR to 0 with MOVE #0,CCR before  
       the addition.



  
   SUBX     dm,dn     (.B),[.W],(.L)        (SUBtract with eXtend)
   --------------
   or
 
   SUBX   -(am),-(an) (.B),[.W],(.L) 
   ------------------

   SUBX is identical to SUB, except here the source operand is increased
   by the X bit of the CCR and subtracted from (in) the destination operand.

   The X bit of the CCR is a copy of the C bit and is set to 1 if the result
   of an operation causes a carry.
   This allows for subtractions with precision 
   greater than a L-M: two L-Ms can be subtracted with SUBX!
 
   All bits of the CCR are affected by SUBX.
                    ---
   NB: To avoid a previous carry interfering with a subtraction with
   --  SUBX, you can set the X bit of the CCR to 0 with MOVE #0,CCR before  
       the subtraction.

  
   SBCD.B     dm,dn       (.B)        (Subtract Decimal with eXtend)
   ----------------
   or
 
   SBCD.B   -(am),-(an)   (.B)
   --------------------

   SBCD is identical to SUB, except here the source operand is increased
   by the X bit of the CCR and added to (in) the destination operand.

   Only the .B size is allowed.

   The X bit of the CCR is a copy of the C bit and is set to 1 if the result
   of an operation causes a carry.

   The V and N bits of the CCR are not affected by SBCD.
                         ---
   The C bit is set to 1 only if there is a Decimal carry.

   NB: To avoid a previous carry interfering with a subtraction
   --  with SBCD, you can set the X bit of the CCR to 0 with MOVE #0,CCR
       before the subtraction.

   NEGX    source   (.B),[.W],(.L)         (NEGate with eXtend) 
   --------------

   NEGX is identical to NEG, except that here the source operand is increased
   by the X bit of the CCR before being subtracted from 0.

   The source operand admits the addressing modes:
              ------      
     dn
     an
     BBBB
     BB
     (an)
     (an)+
     -(an)
     d(an)
     d(an,rn)

   The X bit of the CCR is a copy of the C bit and is set to 1 if the result
   of an operation causes a carry.
 
   All bits of the CCR are affected by NEGX.
                    ---
   NB: To avoid a previous carry interfering with a negation with
   --  NEGX, you can set the X bit of the CCR to 0 with MOVE #0,CCR before  
       the negation.


  
   NBCD.B    source       (.B)        (Negate Decimal with eXtend)
   ----------------

   NBCD is identical to NEG, except that here the source operand is increased
   by the X bit of the CCR and then subtracted from 0.

   Only the .B size is allowed.

   The source operand admits the addressing modes:
              ------ 
     dn
     an
     BBBB
     BB
     (an)
     (an)+
     -(an)
     d(an)
     d(an,rn)

   The X bit of the CCR is a copy of the C bit and is set to 1 if the result
   of an operation causes a carry.

   The V and N bits of the CCR are not affected by NBCD.
                         ---
   The C bit is set to 1 only if there is a decimal carry.

   NB: To avoid a previous carry interfering with a negation with
   --  NBCD, you can set the X bit of the CCR to 0 with MOVE #0,CCR before  
       the negation.




   JMP    destination      (JuMP)
   -----------------

   JMP allows for a jump to the destination address.

   The destination operand admits the addressing modes:
              ----------- 
     BBBB
     BB
     (an)
     d(an)
     d(an,rn)
     d(pc)
     d(pc,rn)

   
   The jump is made by loading the current value of the PC with the value
   of the PC at the destination address.

   The CCR is not affected.
      ---
     
   Examples of use:
   -----------------------  
   JMP    here
   or
   LEA.L  here,a0
   JMP    (a0)
   or
   JMP    4(pc)
   etc...



   BRA    Label        (BRAnch)
   ------------

   BRA allows for a jump to the address pointed to by the Label
   (as with JMP)

   The jump is made by loading the current value of the PC with the value
   of the PC at the destination address.

   The CCR is not affected.
      ---

   Example of use:
   ----------------------  
   BRA    laurent
  


   JSR    Destination    (Jump Sub Routine)
   ------------------

   Like JMP, JSR allows for a jump to the address pointed to by
   the destination operand.

   The destination operand admits the addressing modes:
              ----------- 
     BBBB
     BB
     (an)
     d(an)
     d(an,rn)
     d(pc)
     d(pc,rn)

   
   Additionally, the address of the instruction following JSR is placed in
   the system stack (SP):

   There are 2 types of STACKS:
  .The system stack and stacks implemented by the user.
  .The system stack is pointed to by the A7 or SP register.
  .The difference between these 2 stacks lies in the fact that they are
   managed entirely independently.
  .If we are in SUPERVISOR MODE, the system stack is available to us.
  .If we are in USER MODE, the stack is called the user stack.

   The SYSTEM STACK is a particular part of the memory, it is
   especially used by jump instructions to deposit
   the return address to the instruction.

          |--------|--------|
          |--------|--------|   SYSTEM  
          |--------|--------|   STACK
          |--------|--------|

   Data can be stored in this stack. (this is how, for example,
   parameters are passed to functions of the Bios,Xbios,Gemdos)    

   Storing data in the System Stack is done:

   .Either by predecrementing the stack pointer SP  ( -(sp) )

    - In this case, reading the data will be done by mode (sp)+

   .Or by postincrementing the stack pointer SP ( (sp)+ )  
                     
    - In this case, reading the data will be done by mode -(sp)


   NB: I remind you that the SP (Stack Pointer) must only point
   -- to EVEN addresses!
      The decrementation or incrementation of SP by 1 unit will therefore
      be prohibited.


   Example of data stacking in predecrement mode:
   -------  
   MOVE   #5-(sp)   ;5=%101
   MOVE   #3-(sp)   ;3=%11
 
   We obtain:

          |--------|--------|         
 SP ----->|00000000|00000011|       /|\   Data is stacked 
          |00000000|00000101|        |    in mode -(SP)
 SP before>|--------|--------|

   SP was decremented by 4 units ( -(sp) 2 times with .W )


   MOVE   (sp)+,d0
   MOVE   (sp)+,d1

   We obtain:

          |--------|--------|         
 SP before>|00000000|00000011|        |    Data is unstacked 
          |00000000|00000101|       \|/   in mode (SP)+
 SP ----->|--------|--------|        

   SP was incremented by 4 units ( (sp)+ 2 times with .W )

   d0 will contain the WORD 3
   d1 will contain the WORD 5

   SP regains its initial value after unstacking the data.

   NB:   It will be important to ensure that the SP is restored to its 
   --  initial value after using the SYSTEM STACK because the size of that
       stack is limited.


   But let's get back to JSR:    We have seen that the instruction
   deposits the address of the next instruction following JSR into the
   system stack before performing a jump to the destination address.

   SP is therefore decremented by 4 units (because an address is contained 
   in a L-M)

   The system stack will therefore look like this after a JSR:

          |--------|--------|         
 SP ----->|XXXXXXXX|XXXXXXXX|       /|\   The return address 
          |XXXXXXXX|XXXXXXXX|        |    after JSR is pointed to by
 SP before>|--------|--------|             SP which was decremented by
                                          4 units ( -(SP) with .L )


  This address will later be unstacked at the end of the subroutine
  by a specific instruction and will be loaded into the PC: 
  This will cause the return to the instruction following JSR.

  JSR differs from JMP in that JSR saves the address of the
  next instruction that follows it in the system stack, so that
  it is possible to return to this address after having jumped
  to the destination address of JSR.
   


  BSR     label          (Branch Sub Routine)  
  -------------

  BSR is identical to JSR, except that some assemblers allow setting
  the length of the displacement (BRA.S (Word) or BRA.L (L-M) )
   
  (This is of no real interest to us ...)


   RTS     (ReTurn from Subroutine) 
   ---

   RTS, as its name suggests, is the instruction that marks the end of the
   subroutine and operates a jump to the next instruction that
   follows the calling JSR instruction.

   RTS unstacks (by post-increment mode) the address deposited by JSR and loads
   it into the PC: this causes a jump to the address
   that follows JSR.
 
   SP thus regains its initial value.

   The CCR is not affected by RTS.
     ---

   Example of use:
   ----------------------
       MOVE    #3,d0   ;word 3 in d0
       MOVE    #8,d1   ;word 8 in d1
       JSR     add     ;Call to the subroutine 'add'
       MOVE    d0,resu ;puts the lower word of d0 in 'resu'

       ......          ;it's assumed here is an instruction
                       ;that stops the program to prevent
                       ;going further...

add    ADD     d1,d0   ;subroutine 'add'
       RTS             ;end of subroutine, return ^

       BSS

resu   DS.W    1       ;reserves one word

       END  

In 'resu', the WORD 8+3=11 will be found




   RTR        (ReTurn & Restore CCR)
   ---
   RTR is identical to RTS except that RTR:

   .Unstacks 1 WORD from the system stack by post-increment mode and places
    it in the CCR.

   .Unstacks 1 L-M from the system stack by post-increment mode and places
    it in the PC, just like RTS.

   It will be necessary that the first 3 WORDS pointed by SP
   correspond to the needs of RTR.
 

   Example of use:
   ----------------------      
        MOVE  #3,d0  ;3 in d0
        MOVE  d0,d1  ;d0 in d1
        JSR   test   ;goes to the subroutine 'test' and places the address of the 
                     ;next instruction in SP.
        MOVE  #1,d3   
         
        ..........   ;end of program execution to not go further
   
test    MOVE  sr,-(sp)  ;subroutine 'test': places the SR (word) in the stack
                        ;(the stack therefore contains at its top the SR (word)
                        ;then the address placed by JSR (l-m) )
        SUB   d0,d1     ;subtracts d0 from d1: d0=d1, the Z bit of the CCR is
                        ;set to 1. (before SUB it was 0)
        RTR             ;unstacks the SR then the address placed by JSR and
                        ;returns
 
 After returning from the subroutine, the Z bit of the CCR will be null because 
 RTR has restored the SR that we deposited before the subtraction ...



 MOVEM   registers/registers,destination       [.W],(.L)
 ---------------------------------------
 or

 MOVEM   source,registers/registers            [.W],(.L)
 ----------------------------------

 MOVEM allows for saving (1st form) or restoring (2nd form) the
 an and dn registers.

 Only the .W or .L sizes are allowed.

 For the 1st form:
 ----------------
 The destination operand admits the addressing modes:
            -----------
     BBBB
     BB
     (an)
     -(an)
     d(an)
     d(an,rn)
     d(pc)
     d(pc,rn)

 The addressing mode -(an) is commonly used, in this case, the
 registers are stacked in memory by decreasing addresses, in
 the order: a7->a0, d7->d0 

 If the source operand is of the type: d0-d7/a0-a7, all registers are
 transferred.
 
 Otherwise, the first DN register and the last DM register to 
 transfer (separated by the - sign) then the first AN register and the last
 AM register to transfer (separated by the - sign) are indicated.
 Moreover:
 The DN and AN registers are separated by the / sign in the source operand.

 NB: The form dn-dm/an-am is identical to the form an-am/dn-dm for
 -- the source operand.
    (just as the form d0/d1/a0 is identical to the form d0-d1/a0)

 The destination data register an is therefore decremented by a number
 equal to the size x of MOVEM.x (2 if .W,4 if .L) multiplied by the 
 total number of registers to transfer.

 Exp: MOVEM.L  d3-d5/a0-a2,-(SP)
 ---
 The registers a2, a1, then d5, d4, d3 are stacked in the system stack.
 SP is decremented by 6*4=24 units and points to d3, the last 
 stacked register.

      MOVEM.L  a5-a7,-(SP)

 The registers a7, a6, a5 are stacked in the system stack.
 SP is decremented by 3*4=12 units and points to a5, the last
 stacked register.

     MOVEM.W  d3/a0-a1,-(SP)

 The lower words of registers a1, a0, d3 are stacked in the system
 stack.
 SP is decremented by 3*2=6 units and points to the lower word
 of d3, the last stacked word.


 
 For the 2nd form:
 -----------------         
 The source operand admits the addressing modes:
            ------
     BBBB
     BB
     (an)
     (an)+
     d(an)
     d(an,rn)
     d(pc)
     d(pc,rn)

 The addressing mode (an) is commonly used, in this case, the
 registers are unstacked from memory by increasing addresses, and
 put back into the registers in the order: d0->d7, a0->a7 

 If the source operand is of the type: d0-d7/a0-a7, all registers are
 modified.
 
 Otherwise, the first DN register and the last DM register to 
 load (separated by the - sign) then the first AN register and the last
 AM register to load (separated by the - sign) are indicated.
 Moreover:
 The DN and AN registers are separated by the / sign in the source operand.

 NB: The form dn-dm/an-am is identical to the form an-am/dn-dm for
 -- the source operand.
    (just as the form d0/d1/a0 is identical to the form d0-d1/a0)

 The destination data register an is therefore incremented by a number
 equal to the size x of MOVEM.x (2 if .W,4 if .L) multiplied by the 
 total number of registers to modify.
 The destination register an thus regains its initial value after the
 loading of the registers.
 CAUTION, it will be necessary to ensure that the necessary data is 
 present at the indicated address.

 Exp: MOVEM.L  (SP)+,d3-d5/a0-a2
 ---
 The L-Ms pointed by SP are unstacked and copied into d3, d4, d5 then 
 a0, a1, a2. 
 In the system stack, SP is incremented by 6*4=24 units.

      MOVEM.L  (SP)+,a5-a7

 The L-Ms pointed by SP are unstacked and copied into the registers a5,
 a6, a7.
 In the system stack, SP is incremented by 3*4=12 units.

     MOVEM.W  (SP)+,d3/a0-a1

 The words pointed by SP are unstacked into the lower words of the 
 registers d3, a0, a1.
 In the system stack, SP is incremented by 3*2=6 units.

 

 MOVEM does not influence the CCR.
                          ---

 Example of use:
 ----------------------
 MOVE     #3,d0          ;word 3 in d0
 MOVE     #4,d1          ;word 4 in d1
 MOVEM.L  d0-d1,-(SP)    ;saving d0 and d1 (see diagram 1) 
 ADD      d0,d1          ;d1=d0+d1=3+4=7
 MOVEM.L  (SP)+,d0-d1    ;restoring d0 and d1 (see diagram 2)

 Finally: we have d0=3 and d1=4 at the end of the program because the registers d0 and 
             d1 have been saved and then reloaded.  
 
 diagram 1:
 ---------
 MOVEM.L  d0-d1,-(SP)

 The L-Ms of d1=4=%100 and then d0=3=%11 are STACKED in the System Stack:


                  |--------|--------|
                  |--------|--------|         
                  |--------|--------|             STACK   
SP after the 2--->|00000000|00000000|            SYSTEM
decrements        |00000000|00000011|
                  |00000000|00000000|         
                  |00000000|00000100|   
   SP before ---->|--------|--------|


 diagram 2:
 ---------
   MOVEM.L  (SP)+,d0-d1

   We UNSTACK the L-M pointed by SP during the increments and
   place them into d0 and d1.

                  |--------|--------|
                  |--------|--------|         
                  |--------|--------|             STACK   
  SP before ----->|00000000|00000000|            SYSTEM
                  |00000000|00000011|
                  |00000000|00000000|         
                  |00000000|00000100|   
SP after the 2 -->|--------|--------|
increments (.L)

   MOVEP   dn,d(an)      [.W],(.L)
   ----------------
   or

   MOVEP  d(an),dn       [.W],(.L)
   ---------------

   MOVEP allows saving (1st form) or reloading (2nd form) a
   data register dn (its least significant word for MOVEP.W or the
   entire register for MOVEP.L) pointed by an addressing mode of
   type indirect with displacement d(an).

   MOVEP is a very particular instruction because the data register
   dn is saved (or loaded) in the following way:

   For MOVEP.W:

   The least significant byte of dn is saved or loaded from the
   address pointed by d(an) (or d(an)+1 if this address was
   ODD)

   The most significant byte of dn is saved or loaded from the
   address pointed by d(an)+2 (or d(an)+3 if this address was
   ODD)

   For MOVEP.L

   The least significant byte of dn is saved or loaded from the
   address pointed by d(an) (or d(an)+1 if this address was
   ODD)

   The most significant byte of the least significant word of dn is saved or
   loaded from the address pointed by d(an)+2 (or d(an)+3 if this
   address was ODD)

   The least significant byte of the most significant word of dn is saved or
   loaded from the address pointed by d(an)+4 (or d(an)+5 if this
   address was ODD)

   The most significant byte of dn is saved or loaded from the
   address pointed by d(an)+6 (or d(an)+7 if this address was
   ODD)

   IN SUMMARY:
   ----------
   MOVEP.L dn,d(an): If d(an) points to an EVEN address.
                        -----                    ----- 

           BYTES                 MEMORY
           ------                -------     
         most significant
   dn:    ********      -------> d(an)       even
   --                            d(an)+1     odd
          ********      -------> d(an)+2     even
                                 d(an)+3     odd
          ********      -------> d(an)+4     even
                                 d(an)+5     odd
          ********      -------> d(an)+6     even
        least significant      



   MOVEP.L dn,d(an): If d(an) points to an ODD address.
                        -----                    ------- 

           BYTES                 MEMORY
           ------                -------     
         most significant
   dn:    ********      -------> d(an)+1     even
   --                            d(an)+2     odd
          ********      -------> d(an)+3     even
                                 d(an)+4     odd
          ********      -------> d(an)+5     even
                                 d(an)+6     odd
          ********      -------> d(an)+7     even
        least significant      


   MOVEP always places a data register in memory
   on EVEN addresses.(By alternating 'empty' bytes and bytes
   contained in dn which are always located at even addresses)


   MOVEP does not affect the CCR.
                            ---

   Example of use:
   ----------------------    
   MOVE.L      #%00000000000000001111111100000001,d0
   LEA         aa,a0
   MOVEP       d0,0(a0)

   BSS

aa DS.B        43 


'aa' is an even address (BSS initializes PC) at 0(a0) we therefore find
the most significant byte of d0 which is %00000000.
'aa'+1 is an odd address.
'aa'+2 is an even address, at 2(a0) we find the least significant byte
of the most significant word of d0 which is %00000000
'aa'+3 is an odd address
'aa'+4 is an even address, at 4(a0) we find the most significant byte
of the least significant word of d0 which is %11111111
'aa'+5 is an odd address
'aa'+6 is an even address, at 6(a0) we find the least significant byte
of d0 which is %00000001

All these bytes are located at even addresses.



   PEA     source   (Push Effective Address)
   --------------

   PEA places the address of the source operand in the system stack as an
   L-M, thus SP will be decremented by 4 units.

   The source operand admits the following addressing modes:
             ------  
     BBBB
     BB
     (an)
     d(an)
     d(an,rn)
     d(pc)
     d(pc,rn)

   The CCR is not affected by PEA.
     ---
   Example of use:
   ----------------------   
     PEA      eee      ;places the address pointed by the label 'eee' in the
                       ;system stack. (see 1°)
     MOVE.L   (SP)+,a0 ;unstacks the L-M pointed by SP and places it in a0
                       ;(see 2°)
     JMP      (a0)     ;jumps to the address pointed by a0 (thus in 'eee')

     MOVE     #4,d0

eee  MOVE     #3,d1

     END
  
Finally: d1=3 and d0 is unused.

1°)  The system stack will thus look like this after a PEA:
---
          |--------|--------|         
 SP ----->|XXXXXXXX|XXXXXXXX|       /|\  The address (L-M) of the source 
          |XXXXXXXX|XXXXXXXX|        |   operand is stacked in the system 
 SP before>|--------|--------|            stack: SP is therefore decremented
                                         by 4 units (-(SP) with .L)


2°)  The system stack will then look like this after MOVE.L  (SP)+,a0
---    
          |--------|--------|         
 SP before>|XXXXXXXX|XXXXXXXX|        |    The address (L-M) pointed
          |XXXXXXXX|XXXXXXXX|       \|/   by SP is placed in a0.
 SP ----->|--------|--------|             SP which has been incremented by
                                          4 units ((SP)+ with .L)

   a0=XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX (the address placed by PEA)



                             ------------------


  PIECHOCKI Laurent
  8,impasse Bellevue              Continue in file INSTRUC3.DOC
  57980 TENTELING                                       ------------

Back to ASM_Tutorial

Retrieved from ‘https://www.atari-wiki.com/index.php?title=Pl_INSTRUC2.DOC&oldid=1000000962’