-------------------------
CHAPTER FOUR
THE 68000 INSTRUCTIONS
-------------------------
*** THE 68000 INSTRUCTIONS ***
---------------------------------
- Here is a chapter that is entirely dedicated to the different
68000 assembler instructions.
- Now that you know how to access data in memory thanks to addressing
modes, we will look at the instructions that allow to modify, move...
in other words to manipulate the data.
- For each instruction, I will give you:
.The syntax for the instruction and its operands.
.Its effects, its purpose.
.The addressing modes allowed for the operands.
.The effect of the instruction on the registers and notably on
the CCR.
.And of course some examples of use...
- New concepts will appear in the explanations concerning
instructions, they will be detailed, explained and commented.
--------------------
*** THE 68000 INSTRUCTIONS ***
---------------------------------
MOVE source,destination :(.B),[.W],(.L)
All three operation sizes are allowed for this instruction,
with [.W] being the default size.
The 'source' operand is copied (and remains unchanged) to (in)
the 'destination' operand.
The allowed addressing modes for the source operand are:
dn (data registers)
an (address registers)
BBBB
BB
#BBB
(an)
(an)+
-(an)
d(an)
d(an,rn)
d(pc)
d(pc,rn)
The allowed addressing modes for the destination operand are:
dn
an
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
Only the N and Z Bits of the CCR are affected.
Example of use:
Move.l #1456701,d0
The L-M equal to 1256701 is placed in the data register d0.
MOVEQ #D,dn
The source operand is an immediate, signed data contained in an
octet (-128<= D <128).
The destination operand is a data register.
The source data, signed and contained in an octet, is copied into a
data register with SIGN EXTENSION of the register:
Meaning that the data is placed in the least significant byte of
the Dn register and the MSB is extended (copied) up to the 31st bit of
the register, so that the data register is fully affected by the
'data loading' and the sign of the data is preserved.
The source operand therefore allows the addressing mode:
#BBB ( -128<= BBB <128 )
The destination operand is a data register.
Only the N and Z Bits of the CCR are affected by this instruction.
---
Example:
MOVEQ #%01100101,d0
The octet 01100101 is placed in d0:
d0= : 00000000000000000000000001100101
Bit nr 31 .
. .
MSB (0) <---------------MSB (0)
There has been sign extension of d0 (here MSB=0 because 01100101>0)
NB: Moveq is distinguished from Move by greater speed, but
-- remember the conditions of use of Moveq!
MOVEA source,an :(.W),(.L)
The Movea instruction complements the Move instruction as it accepts an
Address Register for the destination operand.
On most assemblers, the syntax MOVE source,an is
accepted and automatically translated to MOVEA source,an.
If the source operand uses the .W operation size, there is
sign extension of the address register an.
The .B size is not allowed for MOVEA.
The allowed addressing modes for the source operand are:
dn
an
BBBB
BB
#BBB
(an)
(an)+
-(an)
d(an)
d(an,rn)
d(pc)
d(pc,rn)
The destination operand is an address register
The MOVEA instruction does not affect the CCR.
---
Example of use:
MOVEA.L #etiq,a5
The address register a5 is loaded with the address pointed to by the
label 'etiq'.
LEA source,an : [.L]
This instruction reads: 'Load Effective Address'
Only the .L operation size is possible, and is the default.
It allows for placing the address pointed to by the source operand into
an address register.
The source operand allows the addressing modes:
BBBB
BB
(an)
d(an)
d(an,rn)
d(pc)
d(pc,rn)
The destination operand is an address register
------------------
The LEA instruction does not influence the CCR.
---
Example of use:
LEA etiq,a2
The address pointed to by the label 'etiq' is placed in the
address register a2.
In fact, this can also be done with MOVE.L #etiq,a2, but
it is less fast.
CLR destination :(.B),[.W],(.L)
This instruction reads: 'CLeaR destination'
And allows for setting all bits of the destination operand to 0.
All three operation sizes are possible.
The allowed addressing modes for the destination operand are:
dn
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
The Z bit of the CCR is set to 1, the N, V, C bits to 0.
---
Example of use:
CLR.W D0
The 16 bits of the least significant word of d0 are set to 0.
NEG destination : (.B),[.W],(.L)
Allows for performing the NEGation of the destination operand.
All three operation sizes are possible.
The destination operand is subtracted from 0, which has the effect of
changing the sign of the operand: Bits that were active are
turned off and bits that were off are activated.
The destination operand allows the following addressing modes:
dn
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
All Bits of the CCR are affected by the NEGation depending on the
result obtained.
---
Example of use:
MOVE #%1010101010101010,d0
NEG.W d0
The word %0101010101010101 is obtained in d0.
EXT dn : [.W],(.L)
Allows for sign EXTension of the destination operand.
The .B size is not allowed.
In the case of EXT.W dn:
The MSB (bit no. 7) of the data register is extended up to bit no. 15
In the case of EXT.L dn:
The MSB (bit no. 15) of the data register is extended up to bit no. 31
This allows for extending the content of the data register into a WORD
or into an L-M while preserving the sign of the register.
The destination operand can only be a data register.
The N and Z Bits of the CCR are set according to the result of
the operation. ---
Example of use:
MOVE.W #%0001011001010010,d5
EXT.L d5
The MSB (here 0) will be copied from bit no. 16 to bit no. 31, so d5 will contain
an L-M: %00000000000000000001011001010010, not just a WORD.
EXG rn,rm
EXG allows for swapping the contents of two dn or an registers.
The .L size is the default
The source operand is a data or address register
The destination operand is a data or address register
The CCR is not affected by EXG
---
Example of use:
MOVE.L #$FF,d0
MOVE.L #$A2,d1
EXG d1,d0
D0 will contain the L-M $A2 and d1 the L-M $FF.
SWAP dn
Swaps the two WORDS of the L-M contained in the data register dn
The destination operand must be a data register.
The N and Z Bits of the CCR are affected according to the result obtained.
---
Example of use:
MOVE.L #%11111111111111110000000000000000,d3
SWAP d3
D3 will contain the L-M: %00000000000000001111111111111111
Note that the sign of the dn register is not preserved and can be changed!
ADD dn,destination :(.B),[.W],(.L)
or
ADD source,dn :(.B),[.W],(.L)
Adds the source operand INTO the destination operand (the source
operand is therefore unchanged and the result is found in the destination
operand! )
All three operation sizes are accepted.
The allowed addressing modes for the source operand when ADD
is written: ADD.x source,dn are: ------
----------------
dn
an
BBBB
BB
#BBB
(an)
(an)+
-(an)
d(an)
d(an,rn)
d(pc)
d(pc,rn)
If the source operand is an address register, the .B size is
not allowed; if the size is .W, there is sign EXTension of an.
The allowed addressing modes for the destination operand when ADD
is written ADD.x dn,destination are: -----------
---------------------
dn
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
All Bits of the CCR may react to the ADD operation depending on
the result obtained.
Example of use:
ADD.B d0,d1
The least significant byte of the data register d0 is added to
the least significant byte of d1, the result is in d1:
d0=d0, d1=d1+d0
ADDI #BBB,destination :(.B),[.W],(.L)
ADDI reads: 'ADD Immediate'
All three operation sizes are allowed.
The immediate data source is added to the destination operand.
The addressing modes allowed for the destination operand are:
dn
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
All 5 codes of the CCR are affected by ADDI
---
Example of use:
ADDI.W #12,(a0)
The word 12 is added to the word pointed to by the address register a0.
ADDQ #BBB,destination :(.B),[.L],(.L)
The unsigned immediate data #BBB is added INTO the destination
operand.
It is mandatory that 1<= #BBB <=8
The destination operand allows the addressing modes:
dn
an
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
If the destination operand is an address register an, the .B size
is forbidden; if the .W size is used, there will be sign EXTension
of an to an L-M.
All 5 Bits of the CCR are modified by ADDQ depending on the result.
---
Example of use:
ADDQ.W #3,d0
Adds the word 3 to the least significant word of d0.
Note: ADDQ is faster than ADDI, which explains the name
of the instruction: ADD Quick
Be aware that 1<= #BBB <=8
ADDA source,an :(.W),(.L)
This instruction reads: 'ADD Address'
It complements ADD as here the destination operand is an address
register. ----------- --------
Only .W and .L sizes are allowed.
ADDA adds the source operand to the address register an.
The allowed addressing modes for the source operand are:
dn
an
BBBB
BB
#BBB
(an)
(an)+
-(an)
d(an)
d(an,rn)
d(pc)
d(pc,rn)
The CCR is not modified by ADDA
---
Example of use:
ADDA.L #2,a0
a0 is incremented by 2 units.
SUB dn,destination :(.B),[.W],(.L)
or
SUB source,dn :(.B),[.W],(.L)
Subtracts the source operand FROM the destination operand (the source
operand is therefore unchanged and the result is found in the destination
operand! )
All three operation sizes are accepted.
The allowed addressing modes for the source operand if SUB
is written: SUB.x source,dn are: ------
----------------
dn
an
BBBB
BB
#BBB
(an)
(an)+
-(an)
d(an)
d(an,rn)
d(pc)
d(pc,rn)
If the source operand is an address register, the .B size is
not allowed; if the size is .W, there is sign EXTension of an.
The allowed addressing modes for the destination operand if SUB
is written SUB.x dn,destination are: -----------
---------------------
dn
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
All Bits of the CCR may react to the SUB operation depending on
the result obtained.
Example of use:
SUB.B d0,d1
The least significant byte of the data register d0 is subtracted from
the least significant byte of d1, the result is in d1:
d0=d0, d1=d1-d0
SUBI #BBB,destination :(.B),[.W],(.L)
SUBI reads: 'SUBtract Immediate'
All three operation sizes are allowed.
The immediate data source is subtracted from the destination operand.
The addressing modes allowed for the destination operand are:
dn
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
All 5 codes of the CCR are affected by SUBI
---
Example of use:
SUBI.W #12,(a0)
The word 12 is subtracted from the word pointed to by the address register a0.
SUBQ #BBB,destination :(.B),[.L],(.L)
The unsigned immediate data #BBB is subtracted FROM the destination
operand.
It is mandatory that 1<= #BBB <=8
The destination operand allows the addressing modes:
dn
an
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
If the destination operand is an address register an, the .B size
is forbidden; if the .W size is used, there will be sign EXTension
of an to an L-M.
All 5 Bits of the CCR are modified by SUBQ depending on the result.
---
Example of use:
SUBQ.W #3,d0
Subtracts the word 3 from the least significant word of d0.
Note: SUBQ is faster than SUBI, which explains the name
of the instruction: SUBtract Quick
Be aware that 1<= #BBB <=8
SUBA source,an :(.W),(.L)
This instruction reads: 'SUBtract Address'
It complements SUB as here the destination operand is an address
register. ----------- --------
Only .W and .L sizes are allowed.
SUBA subtracts the source operand from the address register an.
The allowed addressing modes for the source operand are:
dn
an
BBBB
BB
#BBB
(an)
(an)+
-(an)
d(an)
d(an,rn)
d(pc)
d(pc,rn)
The CCR is not modified by SUBA
---
Example of use:
SUBA.L #2,a0
a0 is decremented by 2 units (similar to .W, -(a0) ).
MULS source,dn
Allows a Signed MULtiplication of the source operand INTO the
data register dn.
The relative integer 'source' is extended to 16 bits and is multi-
plied by the least significant word of dn. -------
---
The result is in dn and it is an L-M, SIGNED relative integer.
--- ------
The source operand accepts the following addressing modes:
------
dn
BBBB
BB
#BBB
(an)
(an)+
-(an)
d(an)
d(an,rn)
d(pc)
d(pc,rn)
The V and C bits of the CCR are set to 0, the N and Z bits are positioned
according to the result, X is not affected.
Example of use:
MOVE.W #3,D0
MULS #-5,D0
D0 will contain the L-M equal to 3*(-5)=-15
MULU source,dn
Allows an Unsigned MULtiplication (Unsigned) of the source operand
INTO the data register dn.
The relative integer 'source' is extended to 16 bits and is multi-
plied by the least significant word of dn. -------
---
The result is in dn and it is an L-M, UNSIGNED relative integer.
--- ----------
The source operand accepts the following addressing modes:
------
dn
BBBB
BB
#BBB
(an)
(an)+
-(an)
d(an)
d(an,rn)
d(pc)
d(pc,rn)
The V and C bits of the CCR are set to 0, the N and Z bits are positioned
according to the result, X is not affected.
Example of use:
MOVE.W #4,d2
MULU #3,d2
D2 will contain the L-M equal to 4*3=12
DIVS source,dn
Allows a Signed Division of the data register dn by the
relative integer extended to 1 word 'source'.
The relative integer 'source' is extended to 16 bits and is the divisor
of the data register dn. -------
The result is in dn and it is an L-M, SIGNED relative integer such that:
--- -----
The quotient occupies the least significant word of dn.
--------
The remainder (if any) has the sign of the dividend and occupies the
-----
most significant word of dn.
The source operand accepts the following addressing modes:
------
dn
BBBB
BB
#BBB
(an)
(an)+
-(an)
d(an)
d(an,rn)
d(pc)
d(pc,rn)
The C bit of the CCR is set to 0, the N, Z, V bits are positioned according
to the result, the X bit is not affected.
Example of use:
MOVE.W #4,D2
MOVE.W #12,D0
DIVS D2,D0
MOVE.L D0,RES
BSS
RES DS.W 1
QUO DS.W 1
The word pointed to by QUO contains 3 and the word pointed to by RES contains
0 because there is no remainder.
Note: To easily reach the two words (remainder/quotient) of the destination
data register, one can, for example, use the previously seen 'SWAP dn'
instruction.
.If one performs a division by 0, this leads to an exception
procedure and interrupts the execution of the program!
(I will explain later what exception procedures are.)
DIVU source,dn
Allows an UNSIGNED Division of the data register dn by the
relative integer extended to 1 word 'source'.
The relative integer 'source' is extended to 16 bits and is the divisor
of the data register dn. -------
The result is in dn and it is an L-M, UNSIGNED relative integer
such that: --- ---------
The quotient occupies the least significant word of dn.
--------
The remainder (if any) occupies the most significant word of dn.
-----
The source operand accepts the following addressing modes:
------
dn
BBBB
BB
#BBB
(an)
(an)+
-(an)
d(an)
d(an,rn)
d(pc)
d(pc,rn)
The C bit of the CCR is set to 0, the N, Z, V bits are positioned according
to the result, the X bit is not affected.
Note: It is important to ensure that the data ('source' and 'dn') are
positive and that the source operand is different from 0!
.Instructions that operate on unsigned data are
faster than their complementary instructions that operate
on signed data (MULS/MULU, DIVS/DIVU), this is their
only advantage.
The MULS and DIVS instructions can of course also operate
on positive instructions.
CLR destination (.B),[.W],(.L)
The CLR instruction allows to clear all the BITS of the destination
operand (CLeaR).
All 3 operation sizes are possible.
The addressing modes allowed for the destination operand are:
-----------
dn
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
The Z bit of the CCR is set to 1, the N, V, C bits to 0, the X bit is
not affected. ---
Example of use:
MOVE.W #%1111011101110110,d0
CLR.B d0
The least significant byte of d0 is set to 0, so d0 will contain the word:
%1111011100000000 .
Note: The CLR.x instruction is logically equivalent to the
'MOVEQ.x #0, destination' instruction but is curiously slower!
---
AND source,dn (.B),[.W],(.L)
or
AND dn,destination (.B),[.W],(.L)
Allows to perform a logical AND between its two operands.
That is, adding the 2 operands coded in Binary by setting
a rule according to which:
1+1 gives 1
1+0 gives 0
0+0 gives 0
0+1 gives 0
And this for each of the bits of the 2 operands of the instruction.
Example: MOVE.B #%11101011,d0; %11101011
MOVE.B #%10101000,d1; %10101000
AND.B d0,d1 ; ||||||||
||||||||
'''
the byte: %10101000 is obtained
For the first possible syntax of AND, the possible addressing modes
for the 'source' operand are:
------
dn
an
BBBB
BB
#BBB
(an)
(an)+
-(an)
d(an)
d(an,rn)
d(pc)
d(pc,rn)
For the second form of AND, the addressing modes allowed for
the 'destination' operand are:
-----------
dn
an
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
Only the N and Z bits of the CCR are affected by this instruction.
---
OR source,dn (.B),[.W],(.L)
or
OR dn,destination (.B),[.W],(.L)
Allows to perform a logical OR between its two operands.
That is, adding the 2 operands coded in Binary by setting
a rule according to which:
1+1 gives 1
1+0 gives 1
0+1 gives 1
0+0 gives 0
And this for each of the bits of the 2 operands of the instruction.
Example: MOVE.B #%11101011,d0; %11101011
MOVE.B #%10101000,d1; %10101000
OR.B d0,d1 ; ||||||||
||||||||
'''
the byte: %11101011 is obtained
For the first possible syntax of OR, the possible addressing modes
for the 'source' operand are:
------
dn
an
BBBB
BB
#BBB
(an)
(an)+
-(an)
d(an)
d(an,rn)
d(pc)
d(pc,rn)
For the second form of OR, the addressing modes allowed for
the 'destination' operand are:
-----------
dn
an
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
Only the N and Z bits of the CCR are affected by this instruction.
---
EOR dn,destination (.B),[.W],(.L)
Allows to perform a logical EOR (exclusive or) between its two
operands.
That is, adding the 2 operands coded in Binary following the rule:
1+1 gives 0
0+0 gives 0
0+1 gives 1
1+0 gives 1
For each bit of the 2 operands of the instruction.
Example: MOVE.B #%11101011,d0; %11101011
MOVE.B #%10101000,d1; %10101000
EOR.B d0,d1 ; ||||||||
||||||||
'''
the byte obtained is: %01000011
The addressing modes allowed for the 'destination' operand are:
-----------
dn
an
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
Only the N and Z bits of the CCR are affected by this instruction.
---
NOT dn,destination (.B),[.W],(.L)
Allows to perform a logical NOT (negation).
NOT calculates the 1's complement of a number. (NEG is the 2's complement)
The possible addressing modes for the 'source' operand are:
------
dn
an
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
Only the N and Z bits of the CCR are affected by this instruction.
---
The instructions AND, OR, EOR are completed by the 3 immediate logical
instructions:
ANDI #BBB,destination (.B),[.W],(.L)
ORI #BBB,destination (.B),[.W],(.L)
EORI #BBB,destination (.B),[.W],(.L)
.These instructions have a common role to their complementary
instructions but they admit an immediate data as the source operand.
----------------
------
The destination operand admits the addressing modes:
-----------
dn
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
Only the N and Z bits of the CCR are affected by these 3 instructions.
---
Note: The destination operand can also be: 'SR' or 'CCR'.
-- But when the destination operand is CCR, the execution
of these instructions requires that we are in SUPERVISOR MODE!
----------------
Example: ANDI.B #%11111011,sr
-------
sets the Z bit of the SR to 0 without changing the other bits of the SR.
I repeat: ATTENTION!
The CCR can only be reached in SUPERVISOR MODE, otherwise this
would trigger an exception procedure and stop the program.
With the addressing modes SR or CCR, the instructions ANDI,
ORI, EORI are therefore PRIVILEGED INSTRUCTIONS in this case.
The SR is also available in user mode.
MOVE sr,destination
Saves the status register SR at the destination address.
The content of the CCR is not affected by the instruction.
---
The addressing modes allowed for the destination operand are:
-----------
dn
an
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
Example of use:
----------------------
MOVE sr,dest
BSS
dest DS.W 1
the word pointed by 'dest' will contain the SR.
MOVE source,sr
Restores the CCR contained in (at) the source operand.
The CCR is loaded with its new value, the SR is not affected.
--- --
The addressing modes allowed for the source operand are:
------
dn
an
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
Example of use:
----------------------
MOVE sr,dest ;saves the SR with Z=0
CLR d0 ;here the Z bit of the CCR is set to 1 (CLeaR)
MOVE aaa,ccr ;reloads the CCR from 'aaa': Z=0
BSS
dest DS.B 1 ;SR
aaa DS.B 1 ;CCR
The CCR is loaded with the word pointed by 'aaa'.
TST destination (.B),[.W],(.L)
Tests the destination operand against 0 and modifies the bits of
the CCR accordingly.
---
All 3 operation sizes are possible.
The addressing modes allowed for the destination operand are:
-----------
dn
an
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
The N,Z bits of the CCR are affected based on the comparison result,
V and C bits are set to 0, X is not affected.
Example of use:
MOVE.W #5,d0 ;d0=5
TST.W d0 ;the Z bit of the CCR is set to 0 because d0=5
SUB #5,d0 ;d0=5-5=0
TST.W d0 ;the Z bit of the CCR is set to 1 because d0=0
CMP source,destination (.B),[.W],(.L)
Compares the destination operand to the source operand by performing
the subtraction 'destination' - 'source' and modifies the bits of the
CCR accordingly. ---
All 3 operation sizes are possible.
The addressing modes allowed for the source operand are:
------
dn
an (size .B not allowed)
BBBB
BB
#BBB
(an)
(an)+
-(an)
d(an)
d(an,rn)
d(pc)
d(pc,rn)
The addressing modes allowed for the destination operand are:
-----------
dn
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
The N,Z,V,C bits of the CCR are affected based on the comparison result,
X is not affected.
Example of use:
MOVE.B #2,d0
MOVE.B #98,d1
CMP.B d0,d1
The CMP instruction will be used with instructions of the type B**
and DB** which we will study later.
CMPI #BBB,destination (.B),[.W],(.L)
Compares the immediate source operand to the destination operand by
performing the subtraction 'destination' - 'source' and modifies the
bits of the CCR accordingly.
---
All 3 operation sizes are possible.
The addressing modes allowed for the destination operand are:
-----------
dn
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
The N,Z,V,C bits of the CCR are affected based on the comparison result,
X is not affected.
Example of use:
CMPI.L #3,d3
Compares the content of the data register d3 to 3.
CMPA source,an [.W],(.L)
Compares the address register 'an' to the source operand by performing
the subtraction 'an' - 'source' and modifies the bits of the CCR accordingly.
---
Only .W and .L operation sizes are possible.
The addressing modes allowed for the source operand are:
------
dn
an
BBBB
BB
#BBB
(an)
(an)+
-(an)
d(an)
d(an,rn)
d(pc)
d(pc,rn)
The N,Z,V,C bits of the CCR are affected based on the comparison result,
X is not affected.
Example of use:
CMPA.L a2,a3
Compares the content of address register a3 to the content of address
register a2.
CMPM (an)+,(am)+ (.B),[.W],(.L)
Compares the destination operand to the source operand by performing
the subtraction 'destination' - 'source' and modifies the bits of the
CCR accordingly.
All 3 operation sizes are possible.
The addressing mode allowed for the destination and source operand is
the POSTINCREMENT mode.
--------------
The N,Z,V,C bits of the CCR are affected based on the comparison result,
X is not affected.
Example of use:
LEA TAB,a1 ;puts the address of 'TAB' in a1
LEA BAT,a2 ;and the address of 'BAT' in a2
MOVE #5,d3
BBB CMPM.B (a1)+,(a2)+ ;CMPM the byte pointed by a1 to the byte
;pointed by a2 and increments both address
;registers by one unit.
DBF d3,BBB ;loop 6 times
DATA ;data table (bytes)
TAB DC.B 1,2,3,4,5,6
BAT DC.B 6,5,4,3,2,1
B** label (Branch & Condition Code)
-------------
B** with different Condition Codes (**) can change B**'s action.
B** performs a jump to the address pointed by the 'label' if the
requested condition code is justified after a CoMParison,
otherwise, the program continues normally.
The ** are:
B** If A and B are SIGNED | Otherwise, syntax:
---------------------------------------------+----------------
Bgt if A>B (Greater Than) | Bhi (Higher)
Beq if A=B (EQual) | Beq (EQual)
Blt if A= B (Greater or Equal) | Bcc (higher or equal)
Ble if A <= B (Less or Equal) | Bls (lower or equal)
B** actually tests the CCR bits:
Beq tests if the Z bit of the CCR is 1 (CPM subtracts the operands
to test them)
We also find the Condition Codes that only take into account
certain CCR bits and not the result of a comparison:
Bmi if the N bit of the CCR is 1
(Negative)
Bpl if the N bit of the CCR is zero OR if the Z bit of the CCR is 1
(Positive or zero)
Bvc if the V bit of the CCR is zero
(No overflow)
Bvs if the V bit of the CCR is 1
(Overflow)
Bcc if the C bit of the CCR is 1
Bcs if the C bit of the CCR is zero
Example of use:
----------------------
MOVE.W #4,d3 ;d3=4
MOVE.W dat,d0 ;d0=-20
ADD d3,d0 ;d0=-20+4=-16
CMPI #4,d0 ;Compare -16 to 4
BEQ equal ;If equal (Z=1) jump to 'equal'
BMI negative ;If negative (N=1) jump to 'negative'
DATA
dat DC.W -20
In our example, the program will jump to 'negative', this would
be the case even if there wasn't a 'CMPI #4,d0' because with Bmi, only
the N bit of the CCR intervenes, there is no need for comparison,
unlike Beq.
NB: The jump to the destination label is made by loading the
-- value of the PC at this label into the current PC.
DB** dn,label
----------------
Allows for a loop:
The number of passes is contained in the data register dn.
The address where the loop jump should occur is a label.
The instruction also accepts different condition codes (**) which
can branch out of the loop if they are verified.
The possible condition codes are the same as with the B** instruction.
DB** first tests the condition **, if it is verified there is a
branch out of the loop and the program continues to the next
instruction, otherwise, the dn register is decremented by 1:
If dn equals -1 the loop stops and the program continues to
the next instruction.
If dn is positive or zero, a jump to the address pointed by
the label occurs.
The CCR is not affected by DB**.
---
NB: DB** also accepts the following condition codes:
--
.DBf = always false, there is no comparison or test
.DBt = always true, same as above
Example of use:
----------------------
LEA dat,a0 ;address of 'dat' in a0
MOVE #7,d1 ;7 in d1
boo MOVE.W (a0)+,d2 ;puts the WORD pointed by a0 into the lower
;WORD of d2 in post-increment mode
DBMI d1,boo ;tests if N=1 (mi), decrements d1 and jumps to
;'boo' if d1 is positive or zero.
MOVE.W d2,res ;puts the lower WORD of d2 in 'res'
DATA
dat DC.W 1,5,486,0,-2,0,4,8,100,20,5 ;11 words
BSS
res DS.W 1 ;reserve 1 word in 'res'
END
The MI (N=1) condition was verified after 5 passes in 'boo',
the loop branched out before the 8 planned passes because
the WORD -2 was placed in d2: This had the effect of
setting the N bit of the CCR to 1 and thereby exiting the loop
as the MI condition was verified.
At the end of the program: d2=-2, a0 points to the WORD equal to 0, d1=3
and 'res' points to the WORD equal to -2
S** Destination
------------------
The S** instruction also accepts different condition codes.
It tests if the ** condition is verified.
If true, the BYTE at the address pointed by the destination operand
is set to -1 (either $FF or %11111111)
If false, the BYTE is set to 0 ($00 or %00000000)
Of course, this Byte must be reserved! (with DS.B 1 for example)
The possible addressing modes for the destination operand are:
-----------
dn
an
BBBB
BB
(an)
(an)+
-(an)
d(an)
d(an,rn)
The CCR is not affected by S**.
---
Example of use:
----------------------
MOVE #3,d0 ;word 3 in d0
MOVE #3,d1 ;word 3 in d1
CMP.W d0,d1 ;compares the lower words of d1 and d0
SEQ res ;If Equal: sets the byte of 'res' to -1 otherwise
;sets it to 0 (here d1=d0 so it is set to -1)
TST.B res ;Compares the byte of 'res' to 0 (0=false for S**)
BEQ fin ;if it is equal to 0: goes to 'fin'
BNE egal ;otherwise (Not Equal) goes to 'egal'
BSS
res DS.W 1 ;the byte for S**
END
In our example: The program will jump to 'egal'.
------------------------
PIECHOCKI Laurent
8,impasse Bellevue Continuation in: INSTRUC2.DOC
57980 TENTELING ------------------------
