===========#==#=======#===============================================#=====
----------------------|DMA SCC |-----
===========#==#=======#===============================================#=====
$FFFF8C01.B|RW|SCC_DA0|DMA Address Pointer (Highest byte) |TT
$FFFF8C03.B|RW|SCC_DA1|DMA Address Pointer (High byte) |TT
$FFFF8C05.B|RW|SCC_DA2|DMA Address Pointer (Low byte) |TT
$FFFF8C07.B|RW|SCC_DA3|DMA Address Pointer (Lowest byte) |TT
$FFFF8C09.B|RW|SCC_BC0|DMA Byte Counter (Highest byte) |TT
$FFFF8C0B.B|RW|SCC_BC1|DMA Byte Counter (High byte) |TT
$FFFF8C0D.B|RW|SCC_BC2|DMA Byte Counter (Low byte) |TT
$FFFF8C0F.B|RW|SCC_BC3|DMA Byte Counter (Lowest byte) |TT
$FFFF8C10.W|Rw|SCC_DA0|Rest data (High Word) |TT
$FFFF8C12.W|Rw|SCC_DA0|Rest data (Low Word) |TT
$FFFF8C14.W|Rw|SCC_CTL|DMA SCC Control Register %________ BZ____DW |TT
| | | Bus Error 0:no,1:yes-----------------+| || |TT
| | | Byte Counter Zero 0:no,1:yes----------+ || |TT
| | | DMA 0:off,1:on-----------------------------+| |TT
| | | 0:DMA read,1:DMA write----------------------+ |TT
===========#==#=======#===============================================#=====
----------------------|SCC Y8530 - Serial Communication Controller |-----
===========#==#=======#===============================================#=====
$FFFF8C81.B|RW|SCA_CTL|Channel A Control (select/read/write Register) |SCC
$FFFF8C83.B|RW|SCA_DAT|Channel A Data (read/write Register 8) |SCC
$FFFF8C85.B|RW|SCB_CTL|Channel B Control (select/read/write Register) |SCC
$FFFF8C87.B|RW|SCB_DAT|Channel B Data (read/write Register 8) |SCC
===========#==#=======#===============================================#=====
----------------------|VME Bus |-----
===========#==#=======#===============================================#=====
$FFFF8E01.B|RW|VME_MR0|VME Mask Register 0 |TT,ME
$FFFF8E03.B|RW|VME_SR0|VME Status Register 0 %EMSV_HS_ |TT,ME
| | | Error 0:no,1:yes---------------------+||| || |TT,ME
| | | MFP-----------------------------------+|| || |TT,ME
| | | SCC------------------------------------+| || |TT,ME
| | | VBL-------------------------------------+ || |TT,ME
| | | HBL---------------------------------------+| |TT,ME
| | | Software Intereupt-------------------------+ |TT,ME
$FFFF8E05.B|RW|VME_IN0|Force Interrupt on Level 1 %_______F |TT,ME
$FFFF8E07.B|RW|VME_IN1|Force Interrupt on Level 3 %_______F |TT,ME
$FFFF8E0D.B|RW|VME_MR1|VME Mask Register 1 |TT,ME
$FFFF8E0F.B|RW|VME_SR1|VME Status Register 1 %7654321_ |TT,ME
| | | VME Interrupt 1-7 0:on,1:off---------+++++++ |
-----------+--+-------+-----------------------------------------------+-----
$FFFF8E0F.B|RW|M_E_CAC|Cache and CPU Control %???????? |ME
===========#==#=======#===============================================#=====
----------------------|Paddle Ports |-----
===========#==#=======#===============================================#=====
$FFFF9200.W|RW|PAD_BUT|Paddle/Joy Buttons %xxxxxxxx ____3210 |STE,F
| | | Switches--------------------++++++++ |,TT
| | | On Falcon at U47: MSB on the rigth,closed=0 |
$FFFF9202.W|RW|PAD_MOV|Paddle/Joy Move |STE,F
$FFFF9210.W|RW|PAD_PD0|Pad0 Position |STE,F
$FFFF9212.W|RW|PAD_PD1|Pad1 Position |STE,F
$FFFF9214.W|RW|PAD_PD2|Pad2 Position |STE,F
$FFFF9216.W|RW|PAD_PD3|Pad3 Position |STE,F
$FFFF9220.W|RW|PAD_LPX|Lightpen X |STE,F
$FFFF9222.W|RW|PAD_LPY|Lightpen Y |STE,F
===========#==#=======#===============================================#=====
----------------------|DSP 56001 Host - Digital Sync Processor |-----
===========#==#=======#===============================================#=====
$FFFFA200.B|RW|DSP_ICR|Intrrupt Control Register (%IMMHH_TR) |DSP
$FFFFA201.B|RW|DSP_CVR|Command Vector Register (%I__VVVVV) |DSP
$FFFFA202.B|RW|DSP_ISR|Interrupt Status Register (%ID_HHETR) |DSP
$FFFFA203.B|RW|DSP_IVR|Interrupt Vector Register (Vector Number) |DSP
$FFFFA204.B|RW|DSP_TR0|Transfer Highest Byte (DSP56003 32bit) |DSP32
$FFFFA205.B|RW|DSP_TR1|Transfer Hi |DSP
$FFFFA206.B|RW|DSP_TR2|Transfer Mi |DSP
$FFFFA207.B|RW|DSP_TR3|Transfer Lo |DSP
===========#==#=======#===============================================#=====
----------------------|MFP 68901 - Multi Function Peripheral |-----
===========#==#=======#===============================================#=====
$FFFFFA01.B|RW|MFP_PDR|Paralellport Data Register %SRFKBRDC |
$FFFFFA03.B|RW|MFP_AER|Aktive Edge Register %SRFKBRDC |
| | | Interrupt on 0:High-Low,1:Low-High |||||||| |!F
| | | Interrupt on 0:Low-High,1:High-Low |||||||| |F
$FFFFFA05.B|RW|MFP_DIR|Data-direction %SRFKBRDC |
| | | I/O-7 Mono Detect/Sound--------------+||||||| |
| | | I/O-6 RS232 Ring Indicator------------+|||||| |
| | | I/O-5 FDC/HDC--------------------------+||||| |
| | | I/O-4 IKBD/MIDI-------------------------+|||| |
| | | I/O-3 Blitter Done-----------------------+||| |
| | | I/O-2 RS232 CTS---------------------------+|| |
| | | I/O-1 RS232 DCD----------------------------+| |
| | | I/O-0 Centronics Busy-----------------------+ |
$FFFFFA07.B|RW|MFP_IEA|Interrupt Enable A %76AbebeB |
$FFFFFA09.B|RW|MFP_IEB|Interrupt Enable B %54CD3210 |
$FFFFFA0B.B|RW|MFP_IPA|Interrupt Pending A %76AbebeB |
$FFFFFA0D.B|RW|MFP_IPB|Interrupt Pending B %54CD3210 |
$FFFFFA0F.B|RW|MFP_ISA|Interrupt In-Service A %76AbebeB |
$FFFFFA11.B|RW|MFP_ISB|Interrupt In-Service B %54CD3210 |
$FFFFFA13.B|RW|MFP_IMA|Interrupt Mask A %76AbebeB |
| | | I/O 7 Mono Detect/Sound--------------+||||||| |
| | | I/O 6 RS232 Ring----------------------+|||||| |
| | | Timer A--------------------------------+||||| |
| | | Receive Buffer full---------------------+|||| |
| | | Receive Error----------------------------+||| |
| | | Transmit Buffer empty---------------------+|| |
| | | Transmit Error-----------------------------+| |
| | | Timer B-------------------------------------+ |
$FFFFFA15.B|RW|MFP_IMB|Interrupt Mask B %54CD3210 |
| | | I/O 5 FDC/HDC------------------------+||||||| |
| | | I/O 4 IKBD/MIDI-----------------------+|||||| |
| | | Timer C--------------------------------+||||| |
| | | Timer D---------------------------------+|||| |
| | | I/O 3 Blitter Done-----------------------+||| |
| | | I/O 2 RS232 CTS---------------------------+|| |
| | | I/O 1 RS232 DCD----------------------------+| |
| | | I/O 0 Centronics Busy-----------------------+ |
$FFFFFA17.B|RW|MFP_VCR|Vector Register %xxxxI___ |0100
| | | End of Interupt 0:software,1:auto--------+ |1000
| | | VCR should contain------------------%0100?000 |*
$FFFFFA19.B|RW|MFP_TAC|Timer A Control %____EAAA |
$FFFFFA1B.B|RW|MFP_TBC|Timer B Control %____EBBB |
| | | Event Count Mode-------------------------1000 |
| | | Pulse Extension--------------------------1xxx |
| | | Delay------------------------------------0xxx |
| | | ||| |
$FFFFFA1D.B|RW|MFP_TDC|Timer C+D Control %_CCC_DDD |
| | | Timer C Control-----------------------+++ ||| |
| | | Timer D Control---------------------------+++ |
| | | Stop Timer--------------------------------000 |
| | | Delay,Clockdivide 4 3200Hz--------------001 |
| | | Delay,Clockdivide 10 1280Hz--------------010 |
| | | Delay,Clockdivide 16 800Hz--------------011 |
| | | Delay,Clockdivide 50 256Hz--------------100 |
| | | Delay,Clockdivide 64 200Hz--------------101 |
| | | Delay,Clockdivide 100 128Hz--------------110 |
| | | Delay,Clockdivide 200 64Hz--------------111 |
$FFFFFA1F.B|RW|MFP_TAD|Timer A Data |
$FFFFFA21.B|RW|MFP_TBD|Timer B Data |
$FFFFFA23.B|RW|MFP_TCD|Timer C Data |
$FFFFFA25.B|RW|MFP_TDD|Timer D Data |
$FFFFFA27.B|RW|MFP_SYC|Syncronous Character |
$FFFFFA29.B|RW|MFP_UCR|Usart Control %DBBSSPE_ |
| | | Divider 0:div1(sync),1:div16---------+|||||| |
| | | Databits 00:8,01:7,10:6,11:5----------++|||| |
| | | 00:sync,01:1stop,10:1.5stop,11:2stop----++|| |
| | | Parity 0:off,1:on-------------------------+| |
| | | Parity 0:odd,1:even------------------------+ |
$FFFFFA2B.B|RW|MFP_RES|Receiver Status %BOPFSCPR |
| | | Buffer full--------------------------+||||||| |
| | | Overrun Error-------------------------+|||||| |
| | | Parity Error---------------------------+||||| |
| | | Frame Error-----------------------------+|||| |
| | | SCR found/Break--------------------------+||| |
| | | SCR received/Startbit detected------------+|| |
| | | Syncronous Strip Enable--------------------+| |
| | | Receiver Enable-----------------------------+ |
$FFFFFA2D.B|RW|MFP_TRS|Transmitter Status %BUAEBHLT |
| | | Buffer Empty-------------------------+||||||| |
| | | Underrun Error (char sent)------------+|||||| |
| | | Auto Turnaround------------------------+||||| |
| | | EOT End of Transmission-----------------+|||| |
| | | Break------------------------------------+||| |
| | | 00:High,01:Low,10:High,11:loopback,High---++| |
| | | Transmitter Enable--------------------------+ |
$FFFFFA2F.B|RW|MFP_UAD|Usart Data |
===========#==#=======#===============================================#=====
----------------------|FPC - Floating Point Coprocessor |-----
===========#==#=======#===============================================#=====
$FFFFFA40.W|RW|FPC_STA|Status Register |ME
$FFFFFA42.W|RW|FPC_CTL|Cotrol Register |ME
$FFFFFA44.W|RW|FPC_SAV|Save Register |ME
$FFFFFA46.W|RW|FPC_RES|Restore Register |ME
$FFFFFA4A.W|RW|FPC_CMD|Command Register |ME
$FFFFFA4E.W|RW|FPC_CCR|Conditional Code Register |ME
$FFFFFA46.W|RW|FPC_OPR|Operand Register |ME
$FFFFFA46.W|RW|FPC_IAR|Instruction Address Register |ME
===========#==#=======#===============================================#=====
----------------------|MFP 68901 number 2 |-----
===========#==#=======#===============================================#=====
$FFFFFA81.B|RW|MF2_PDR|Parallel Port Data Register |TT
...........| | |........................... |TT
$FFFFFAAF.B|RW|MF2_PDR|USART Data Register |TT
===========#==#=======#===============================================#=====
----------------------|ACIA 6850 (Midi/Keyboard) |-----
===========#==#=======#===============================================#=====
$FFFFFC00.B|R-|KBD_CTL|IKBD Status %IPOFCDTR |
" |-W|KBD_CTL|IKBD Control %ITTBSPDD |
| | | 7N1,7812.5,RTS low,Rec on,Send off= %10010110 |*
$FFFFFC02.B|RW|KBD_DAT|IKBD Data |
$FFFFFC04.B|R-|MID_CTL|MIDI Status %IPOFCDTR |
| | | Interrupt Request--------------------+||||||| |
| | | Parity Error--------------------------+|||||| |
| | | Receiver Overrun-----------------------+||||| |
| | | Frame Error-----------------------------+|||| |
| | | CTS Clear to Send------------------------+||| |
| | | DCD Data Carrier Detect-------------------+|| |
| | | Transmitter Data Register full-------------+| |
| | | Receiver Data Register full-----------------+ |
" |-W|MID_CTL|MIDI Control %ITTBSPDD |
| | | 7N1,31250,RTS low,Rec on,Send off = %10010101 |*
| | | Interrupt 0:off,1:on-----------------+||||||| |
| | | RTS low, TransmitIRQ off--------------00||||| |
| | | RTS low, TransmitIRQ on---------------01||||| |
| | | RTS high,TransmitIRQ off--------------10||||| |
| | | RTS low, TransmitIRQ off,send break---11||||| |
| | | 8 Databits,2 Stopbits,Parity even-------000|| |
| | | 8 Databits,2 Stopbits,Parity odd--------001|| |
| | | 8 Databits,1 Stopbits,Parity even-------010|| |
| | | 8 Databits,1 Stopbits,Parity odd--------011|| |
| | | 7 Databits,2 Stopbits,Parity off--------100|| |
| | | 7 Databits,1 Stopbits,Parity off--------101|| |
| | | 7 Databits,1 Stopbits,Parity even-------110|| |
| | | 7 Databits,1 Stopbits,Parity odd--------111|| |
| | | Clockdivide 1 - 500000.0cps---------------00 |
| | | Clockdivide 16 - 31250.0cps (MIDI Std)----01 |
| | | Clockdivide 64 - 7812.5cps (IKBD!)-------10 |
| | | Master Reset-------------------------------11 |
| | | To link per MIDI you can also use div1/div64! |
$FFFFFC06.B|RW|MID_DAT|MIDI Data |
===========#==#=======#===============================================#=====
----------------------|RP5C15 Real Time Clock |-----
===========#==#=======#===============================================#=====
$FFFFFC21.B|RW| - |Seconds mod 10 %____xxxx |MST
$FFFFFC23.B|RW| - |Seconds div 10 %____xxxx |MST
$FFFFFC25.B|RW| - |Minutes mod 10 %____xxxx |MST
$FFFFFC27.B|RW| - |Minutes div 10 %____xxxx |MST
$FFFFFC29.B|RW| - |Hours mod 10 %____xxxx |MST
$FFFFFC2B.B|RW| - |Hours div 10 %____xxxx |MST
$FFFFFC2D.B|RW| - |Weekday %____xxxx |MST
$FFFFFC2F.B|RW| - |Day mod 10 %____xxxx |MST
$FFFFFC31.B|RW| - |Day div 10 %____xxxx |MST
$FFFFFC33.B|RW| - |Month mod 10 %____xxxx |MST
$FFFFFC35.B|RW| - |Month div 10 %____xxxx |MST
$FFFFFC37.B|RW| - |Year mod 10 %____xxxx |MST
$FFFFFC39.B|RW| - |Year div 10 %____xxxx |MST
$FFFFFC3B.B|RW| - |Clock mod %____xxxx |MST
$FFFFFC3D.B|RW| - |Clock test %____xxxx |MST
$FFFFFC3F.B|RW| - |Clock reset %____xxxx |MST
===========#==#=======#===============================================#=====
$FFFFFF82.W|RW| |
===========#==#=======#===============================================#=====
$FFFF820D.B|RW|VDL_VBL|Video Base Lo %xxxxxxx_ |STE,F
----+---- | +- ---+--- ------------------+---------------------------- --+--
| | | | | |
| | | | | Computer Type---------------+
| | | | +---Description
| | | +--------------------------Label
| | +--------------------------------Read/Write Access
| +----------------------------------Type (Byte,Word,Long)
+----------------------------------------Address (extended to 32 Bit)
Computer Type:
* |Software defined Standart
!xxx|all except xxx
0x0 |MC680x0 only
0x0+|MC680x0 or higher
BLT |Standart on TT,STE,ME,F (Blitter)
SCC |Standart on TT,ME,F
VME |Standart on TT,ME
ST |Atari ST (260/520/1040)
STE |Atari STE (520/1040)
TT |Atari TT
MST |Atari Mega ST (1/2)
ME |Atari Mega STE
F |Atari Falcon
Description:
%
Read/Write Access:
R/-|Read only (Readregister)
-/W|Write only (Writeregister)
R/?|Readaccess allowed
?/W|Writeaccess allowed
r/?|Readaccess allowed but not senseful
?/w|Writeaccess allowed but not senseful